3850 datasheet(15/261 Pages) RENESAS

15 / 261 page

3850/3851 Group User’s Manual

List of tables

CHAPTER 1 HARDWARE

Table 1 Pin description ................................................................................................................. 1-4

Table 2 Push and pop instructions of accumulator or processor status register ................. 1-8

Table 3 Set and clear instructions of each bit of processor status register ......................... 1-9

Table 4 I/O port function table ................................................................................................... 1-13

Table 5 Interrupt vector address and priority .......................................................................... 1-17

Table 6 Multi-master I2C-BUS interface functions ................................................................... 1-25

Table 7 Set values of I2C clock control register and SCL frequency .................................. 1-27

Table 8 START condition generating timing table .................................................................. 1-31

Table 9 STOP condition generating timing table ..................................................................... 1-31

Table 10 START condition/STOP condition detecting conditions ............................................ 1-31

Table 11 Recommended set value to START/STOP condition set bits (SSC4–SSC0) for each

oscillation frequency .................................................................................................... 1-33

Table 12 Programming adapter .................................................................................................. 1-46

Table 13 Interrupt sources, vector addresses and interrupt priority ..................................... 1-47

Table 14 Change of A-D conversion register during A-D conversion .................................. 1-49

CHAPTER 2 APPLICATION

Table 2.1.1 Handling of unused pins .......................................................................................... 2-3

Table 2.2.1 CNTR0 / CNTR1 active edge switch bit function ................................................... 2-8

Table 2.3.1 Setting example of Baud rate generator values and transfer bit rate values 2-47

Table 2.4.1 Set value of I2C clock control register and SCL frequency .............................. 2-58

CHAPTER 3 APPENDIX

Table 3.1.1 Absolute maximum ratings ....................................................................................... 3-2

Table 3.1.2 Recommended operating conditions (1) ................................................................ 3-3

Table 3.1.3 Recommended operating conditions (2) ................................................................ 3-4

Table 3.1.4 Electrical characteristics (1)..................................................................................... 3-5

Table 3.1.5 Electrical characteristics (2) ................................................................................... 3-6

Table 3.1.6 A-D converter characteristics .................................................................................. 3-6

Table 3.1.7 Timing requirements (1) ........................................................................................... 3-7

Table 3.1.8 Timing requirements (2) ........................................................................................... 3-7

Table 3.1.9 Switching requirements (1) ...................................................................................... 3-8

Table 3.1.10 Switching requirements (2) .................................................................................... 3-8

Table 3.1.11 Multi-master I2C-BUS bus line characteristics .................................................. 3-11

Table 3.3.1 Programming adapters ........................................................................................... 3-29

Table 3.3.2 PROM programmer address setting ..................................................................... 3-30

Table 3.5.1 CNTR0 / CNTR1 active edge switch bit function ................................................. 3-46

Table 3.5.2 Set value of I2C clock control register and SCL frequency .............................. 3-49

3850 Datasheet(PDF) 15 Page - Renesas Technology Corp