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TMS320 Datasheet(PDF) 26 Page - Texas Instruments |
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TMS320 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 69 page ![]() TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 26 SERIAL PORT TIMING switching characteristics over recommended operating conditions (see Note 3) PARAMETER MIN TYP MAX UNIT td(CH-DX) DX valid after CLKX rising edge (see Note 10) 100 ns td(FL-DX) DX valid after FSX falling edge (TXM = 0, see Note 10) 50 ns td(CH-FS) FSX valid after CLKX rising edge (TXM = 1) 60 ns NOTES: 3. Q = 1/4tc(C). 10. The last occurrence of FSX falling and CLKX rising. timing requirements over recommended operating conditions (see Note 3) MIN NOM MAX UNIT tc(SCK) Serial port clock (CLKX/CLKR) cycle time 390 20 000† ns tf(SCK) Serial port clock (CLKX/CLKR) fall time 50‡ ns tr(SCK) Serial port clock (CLKX/CLKR) rise time 50‡ ns tw(SCK) Serial port clock (CLKX/CLKR) low pulse duration (see Note 11) 150 12 000 ns tw(SCK) Serial port clock (CLKX/CLKR) high pulse duration (see Note 11) 150 12 000 ns tsu(FS) FSX/FSR setup time before CLKX/CLKR falling edge (TXM = 0) 20 ns th(FS) FSX/FSR hold time after CLKX/CLKR falling edge (TXM = 0) 20 ns tsu(DR) DR setup time before CLKR falling edge 20 ns th(DR) DR hold time after CLKR falling edge 20 ns † Value derived from characterization data; minimum fsx at test = 825 kHz. ‡ Value derived from characterization data and not tested. NOTES: 3. Q = 1/4tc(C). 11. The duty cycle of the serial port clock must be within 40-60%. |
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