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TMS320C44 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320C44 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 42 page ![]() TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031B – AUGUST 1994 – REVISED DECEMBER 1995 5 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Pin Functions (Continued) SIGNAL NAME NO. OF PINS TYPE† DESCRIPTION COMMUNICATION PORT 1 INTERFACE (13 pins) C1D7 – C1D0 8 I/O Communication port 1 data bus CREQ1 1 I/O Communication port 1 token-request signal CACK1 1 I/O Communication port 1 token-request-acknowledge signal CSTRB1 1 I/O Communication port 1 data-strobe signal CRDY1 1 I/O Communication port 1 data-ready signal CDIR1 1 O Communication port 1 direction signal COMMUNICATION PORT 2 INTERFACE (13 pins) C2D7 – C2D0 8 I/O Communication port 2 data bus CREQ2 1 I/O Communication port 2 token-request signal CACK2 1 I/O Communication port 2 token-request-acknowledge signal CSTRB2 1 I/O Communication port 2 data-strobe signal CRDY2 1 I/O Communication port 2 data-ready signal CDIR2 1 O Communication port 2 direction signal COMMUNICATION PORT 4 INTERFACE (13 pins) C4D7 – C4D0 8 I/O Communication port 4 data bus CREQ4 1 I/O Communication port 4 token-request signal CACK4 1 I/O Communication port 4 token-request-acknowledge signal CSTRB4 1 I/O Communication port 4 data-strobe signal CRDY4 1 I/O Communication port 4 data-ready signal CDIR4 1 O Communication port 4 direction signal COMMUNICATION PORT 5 INTERFACE (13 pins) C5D7 – C5D0 8 I/O Communication port 5 data bus CREQ5 1 I/O Communication port 5 token-request signal CACK5 1 I/O Communication port 5 token-request-acknowledge signal CSTRB5 1 I/O Communication port 5 data-strobe signal CRDY5 1 I/O Communication port 5 data-ready signal CDIR5 1 O Communication port 5 direction signal INTERRUPTS, I / O FLAGS, RESET, TIMER (12 pins) IIOF3 – IIOF0 4 I/O Interrupt and I / O flags NMI 1 I Nonmaskable interrupt. NMI is sensitive to a low-going edge. IACK 1 O Interrupt acknowledge RESET 1 I Reset signal RESETLOC1 RESETLOC0 2 I Reset-vector location ROMEN 1 I On-chip ROM enable (0 = disable, 1 = enable) TCLK0 1 I/O Timer 0 TCLK1 1 I/O Timer 1 † I = input, O = output, Z = high impedance |
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