PDB PACKAGE

( TOP VIEW )‡

‡ See Pin Assignments table and Pin Functions table for location

and description of all pins.

76

1

304

77

152

153

228

229

TMS320C44

DIGITAL SIGNAL PROCESSOR

SPRS031B – AUGUST 1994 – REVISED DECEMBER 1995

1

POST OFFICE BOX 1443

Signal Processor (DSP)

– TMS320C44-60:

33-ns Instruction Cycle Time,

330 MOPS, 60 MFLOPS,

30 MIPS, 336M Bytes / s

– TMS320C44-50:

40-ns Instruction Cycle Time

Coprocessor

IEEE-754 Floating-Point Format

’320C4x

32-Bit Integer Multipliers

Registers, 14 Control Registers,

and Two Timers

Compatible

Buses Supporting Shared Memory

Systems and High Data-Rate,

Single-Cycle Transfers

– High Port-Data Rate of 120M Bytes / s

(TMS320C44-60) (Each Bus)

– 128M-Byte Program / Data / Peripheral

Address Space

– Memory-Access Request for Fast,

Intelligent Bus Arbitration

– Separate Address-Bus, Data-Bus, and

Control-Enable Pins

– Four Sets of Memory-Control Signals

Support Different Speed Memories in

Hardware

(PDB Suffix)

Performance Implanted CMOS (EPIC

™)

Technology by Texas Instruments (TI

™)

DMA-Coprocessor Buses for Support of

Massive Concurrent I / O of Program and

Data, Thereby Maximizing Sustained CPU

Performance

Dual-Access / Single-Cycle RAM for

Increased Memory-Access Performance

– 512-Byte Instruction Cache

– 8K Bytes of Single-Cycle Dual-Access

Program or Data RAM

– ROM-Based Boot Loader Supports

Program Bootup Using 8-, 16-, or 32-Bit

Memories or One of the Communication

Ports

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

© 1995, Texas Instruments Incorporated

† IEEE Standard 1149.1–1990 Standard Test-Access Port and Boundary-Scan Architecture

EPIC and TI are trademarks of Texas Instruments Incorporated.