TMS320F243FN datasheet(79/116 Pages) TI

79 / 116 page

TMS320F243, TMS320F241

DSP CONTROLLERS

SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

low-power mode timings

switching characteristics over recommended operating conditions [H = 0.5tc(CO)]

(see Figure 22, Figure 23, and Figure 24)

PARAMETER

LOW-POWER MODES

MIN

TYP

MAX

UNIT

td(WAKE A)

Delay time, CLKOUT switching to

IDLE1

LPM0

4+6t (CO) 15 t (CO)

td(WAKE-A)

program execution resume

IDLE1

LPM0

4 + 6 tc(CO) 15 tc(CO)

td(IDLE-COH)

Delay

time,

Idle

instruction

executed to CLKOUT high

IDLE2

LPM1

4tc(CO)

td(WAKE-OSC)

Delay time, wakeup interrupt

asserted to oscillator running

HALT

{PLL/OSC power down}

LPM2

OSC start-up

and PLL lock

time

td(IDLE-OSC)

Delay

time,

Idle

instruction

executed to oscillator power off

{PLL/OSC power down}

LPM2

4tc(CO)

µs

td(EX)

Delay time, reset vector executed

after RS high

36H

WAKE INT

CLKOUT

A0–A15

td(WAKE–A)

Figure 22. IDLE1 Entry and Exit Timing – LPM0

td(WAKE–A)

td(IDLE–COH)

WAKE INT

CLKOUT

A0–A15

Figure 23. IDLE2 Entry and Exit Timing – LPM1

td(EX)

td(IDLE–COH)

td(IDLE–OSC)

RESET

CLKOUT

A0–A15

td(WAKE–OSC)

Figure 24. HALT Mode – LPM2

NOTE: WAKE INT can be any valid interrupt or RESET

TMS320F243FN Datasheet(PDF) 79 Page - Texas Instruments

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