TMS320F243FN datasheet(96/116 Pages) TI

96 / 116 page

TMS320F243, TMS320F241

DSP CONTROLLERS

SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

external memory interface

write timings

switching characteristics over recommended operating conditions for an external memory

interface write [H = 0.5tc(CO)] (see Figure 39)

PARAMETER

MIN

MAX

UNIT

td(COH–CNTL)

Delay time, CLKOUT high to control valid

td(COH–CNTH) Delay time, CLKOUT high to control inactive

td(COH–A)W

Delay time, CLKOUT high to address valid

td(COH–RWL)

Delay time, CLKOUT high to R/W low

td(COH–RWH)

Delay time, CLKOUT high to R/W high

td(COL–WL)

Delay time, CLKOUT low to WE strobe active low

–4

td(COL–WH)

Delay time, CLKOUT low to WE strobe inactive high

–4

ten(D)COL

Enable time, data bus driven from CLKOUT low

td(COL–SL)

Delay time, CLKOUT low to STRB active low

td(COL–SH)

Delay time, CLKOUT low to STRB inactive high

th(A)COHW

Hold time, address valid after CLKOUT high

H–1

tsu(A)W

Setup time, address valid before WE strobe active low

H–9

tsu(D)W

Setup time, write data before WE strobe inactive high

2H–1

th(D)W

Hold time, write data after WE strobe inactive high

tdis(W-D)

Disable time, data bus high impedance from WE high

TMS320F243FN Datasheet(PDF) 96 Page - Texas Instruments

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