TMS370Cx32

8-BIT MICROCONTROLLER

SPNS015C – FEBRUARY 1990 – REVISED FEBRUARY 1997

4

POST OFFICE BOX 1443

description (continued)

Table 1 provides a memory configuration overview of the TMS370Cx32 devices.

Table 1. Memory Configurations

DEVICE

PROGRAM MEMORY

(BYTES)

DATA MEMORY

(BYTES)

44 PIN PACKAGES

ROM

EPROM

RAM

EEPROM

TMS370C032A

8K

—

256

256

FN – PLCC

TMS370C332A

8k

—

256

—

FN – PLCC

TMS370C732A

—

8K

256

256

FN – PLCC

SE370C732A†

—

8K

256

256

FZ – CLCC

† System evaluators and development are for use only in prototype environment, and their reliability has not been characterized.

The suffix letter (A) appended to the device names shown in the device column of Table 1 indicates the

configuration of the device. ROM or EPROM devices have different configurations as indicated in Table 2. ROM

devices with the suffix letter A are configured through a programmable contact during manufacture.

Table 2. Suffix Letter Configuration

DEVICE‡

CLOCK

LOW-POWER MODE

EPROM A

Divide-by-4 (Standard oscillator)

Enabled

ROM A

Divide by 4 or Divide by 1 (PLL)

Enabled or disabled

ROM A

Divide-by-4 or Divide-by-1 (PLL)

Enabled or disabled

‡ Refer to the “device numbering conventions” section for device nomenclature and to the “device part numbers” section for ordering.

The 8K bytes of mask-programmable ROM in the associated TMS370Cx32 devices are replaced in the

TMS370C732A with 8K bytes of EPROM. All other available memory and on-chip peripherals are identical

except for the TMS370C332A which does not have EEPROM memory. The OTP (TMS370C732A) and

reprogrammable (SE370C732A) devices are available.

The TMS370C732A OTP device is available in a plastic package. This microcontroller is effective to use for

immediate production updates for other members of the TMS370Cx32 family or for low-volume production runs

when the mask charge or cycle time for the low-cost mask ROM devices is not practical.

The SE370C732A has a windowed ceramic package to allow reprogramming of the program EPROM memory

during the development / prototyping phase of design. The SE370C732A device allows quick updates to

breadboards and prototype systems while iterating initial designs.

The TMS370Cx32 family provides two low-power modes (STANDBY and HALT) for applications where

low-power consumption is critical. Both modes stop all CPU activity (that is, no instructions are executed). In

the STANDBY mode, the internal oscillator, the PACT counter, and PACT’s first command / definition entry

remain active. This allows the PACT module to bring the device out of STANDBY mode. In the HALT mode, all

device activity is stopped. The device retains all RAM data and peripheral configuration bits throughout both

low-power modes.

The TMS370Cx32 features advanced register-to-register architecture that allows direct arithmetic and logical

operations without requiring an accumulator (for example, ADD R24, R47; add the contents of register 24 to

the contents of register 47 and store the result in register 47). The TMS370Cx32 family is fully

instruction-set-compatible, providing easy transition between members of the TMS370 8-bit microcontroller

family.

The TMS370Cx32 has a PACT module that acts as a timer coprocessor by gathering timing information on input

signals and controlling output signals with little or no intervention by the CPU. The coprocessor nature of this

module allows for levels of flexibility and power not found in traditional microcontroller timers.