TMS370 datasheet(18/60 Pages) TI

18 / 60 page

TMS370Cx2x

8-BIT MICROCONTROLLER

SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

system configuration registers

Table 11 contains peripheral file frame 1 system configuration and control register functions for controlling

EEPROM programming. The privileged bits are shown in bold typeface and shaded.

Table 11. Peripheral File Frame 1: System Configuration and Control Registers†

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

REG

P010

COLD

START

OSC

POWER

PF AUTO

WAIT

OSC FLT

FLAG

MC PIN

WPO

MC PIN

DATA

—

µP/µC

MODE

SCCR0

P011

—

AUTOWAIT

DISABLE

—

MEMORY

DISABLE

—

SCCR1

P012

HALT/

STANDBY

PWRDWN/

IDLE

—

BUS

STEST

CPU

STEST

—

INT1

NMI

PRIVILEGE

DISABLE

SCCR2

P013

P016

Reserved

P017

INT1

FLAG

INT1

PIN DATA

—

INT1

POLARITY

INT1

PRIORITY

INT1

ENABLE

INT1

P018

INT2

FLAG

INT2

PIN DATA

—

INT2

DATA DIR

INT2

DATA OUT

INT2

POLARITY

INT2

PRIORITY

INT2

ENABLE

INT2

P019

INT3

FLAG

INT3

PIN DATA

—

INT3

DATA DIR

INT3

DATA OUT

INT3

POLARITY

INT3

PRIORITY

INT3

ENABLE

INT3

P01A

BUSY

—

W1W0

EXE

DEECTL

P01B

Reserved

P01C

BUSY

VPPS

—

EXE

EPCTL

P01D

P01E

P01F

Reserved

† Privileged bits are shown in bold typeface.

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