TMS370 datasheet(32/60 Pages) TI

32 / 60 page

TMS370Cx2x

8-BIT MICROCONTROLLER

SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial communications interface 1 (SCI1) (continued)

The SCI1 module block diagram is illustrated in Figure 12.

RXCTL.4 – 2

FE OE PE

RX ERROR

SCICTL.3

TXWAKE

SCICCR.6 SCICCR.5

EVEN / ODD ENABLE

PARITY

Frame Format and Mode

WUT

TXBUF.7 – 0

Transmit Data

Buffer Reg.

TXSHF Reg.

TXCTL.7

TXCTL.6

TXRDY

TX EMPTY

SCI TX Interrupt

TXCTL.0

TXENA

SCICTL.4

BAUD MSB. 7 – 0

Baud Rate

MSbyte Reg.

BAUD LSB. 7 – 0

Baud Rate

LSbyte Reg.

CLOCK

SCICTL.1

SCITXD

SCI TX INT ENA

RXCTL.7

ERR

RXSHF Reg.

RXCTL.1

Receive Data

Buffer Reg.

RXBUF.7 – 0

RXENA

RXCTL.6

RXCTL.5

RXRDY

BRKDT

SCI RX Interrupt

RXCTL.0

SCI RX INT ENA

SCIPRI.6

SCIPRI.5

Level 1 INT

Level 2 INT

Level 1 INT

Level 2 INT

SCITX PRIORITY

SCIRX PRIORITY

SCITXD

SCIPC2.7 – 4

SCICLK

SCIPC1.3 – 0

SCIRXD

SCIPC2.3 – 0

SCICTL.0

RXWAKE

SYSCLK

Figure 12. SCI1 Block Diagram

instruction set overview

Table 17 provides an opcode-to-instruction cross reference of all 73 instructions and 274 opcodes of the

‘370Cx2x instruction set. The numbers at the top of this table represent the most significant nibble (MSN) of the

opcode while the numbers at the left side of the table represent the least significant nibble (LSN). The instruction

of these two opcode nibbles contains the mnemonic, operands, and byte / cycle particular to that opcode.

For example, the opcode B5h points to the CLR A instruction. This instruction contains one byte and executes

in eight SYSCLK cycles.

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