TMS370 datasheet(11/59 Pages) TI

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TMS370Cx7x

8-BIT MICROCONTROLLER

SPNS034C – SEPTEMBER 1995 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

peripheral file (PF)

The TMS370Cx7x control registers contain all the registers necessary to operate the system and peripheral

modules on the device. The instruction set includes some instructions that access the peripheral file (PF)

directly. These instructions designate the register by the number of the PF relative to 1000h, preceded by P0

for a hexadecimal designator, or by P for a decimal designator. For example, the system control register 0

(SCCR0) is located at address 1010h; its peripheral file hexadecimal designator is P010, and its decimal

designator is P16. Table 4 shows the TMS370Cx7x peripheral files.

Table 4. TMS370Cx7x Peripheral File Address Map

ADDRESS RANGE

PERIPHERAL FILE

DESIGNATOR

DESCRIPTION

1000h – 100Fh

P000 – P00F

Reserved for factory test

1010h – 101Fh

P010 – P01F

System and EEPROM/EPROM control registers

1020h – 103Fh

P020 – P03F

Digital I/O port control registers

1040h – 104Fh

P040 – P04F

Timer 1 registers

1050h – 105Fh

P050 – P05F

Reserved

1060h – 106Fh

P060 – P06F

Timer 2A registers

1070h – 107Fh

P070 – P07F

Analog-to-digital converter 1 registers

1080h – 10FFh

P080 – P0FF

Reserved

data EEPROM

The TMS370Cx7x devices contain 256 bytes of data EEPROM, and have a memory map beginning at location

1F00h, and continuing through location 1FFFh. Writing to the data EEPROM module is controlled by the data

EEPROM control register (DEECTL) and the write-protection register (WPR). Programming algorithm

examples are available in the

TMS370 Family User’s Guide (literature number SPNU127), or the TMS370

Family Data Manual (SPNS014B). The data EEPROM features include the following:

D Programming:

–

Bit, byte, and block write/erase modes

–

Internal charge pump circuitry: No external EEPROM programming voltage supply is needed.

–

Control register: Data EEPROM programming is controlled by the data EEPROM control register

(DEECTL) located in the PF frame beginning at location P01A.

–

In-circuit programming capability: There is no need to remove the device to program.

D Write-protection: Writes to the data EEPROM are disabled during the following conditions:

–

Reset: All programming of the data EEPROM module is halted.

–

Write protection active: There is one write-protect bit per 32-byte EEPROM block.

–

Low-power mode operation

D Write protection can be overridden by applying 12 V to MC.

Table 5 shows the memory map of the control registers.

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