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LTC3554EPD Datasheet(PDF) 12 Page - Linear Technology |
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LTC3554EPD Datasheet(HTML) 12 Page - Linear Technology |
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12 / 36 page ![]() LTC3554 12 3554f PIN FUNCTIONS LTC3554 will partition the available power between the external load on VOUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to VOUT ensures that VOUT is powered even if the load exceeds the allotted input current from VBUS or if the VBUS power source is removed. VOUT should be bypassed with a low impedance multilayer ceramic capacitor. SUSP (Pin 19): Suspend Mode Logic Input. If this pin is driven high the input current limit path is disabled. In this state the circuit draws negligible power from the VBUS pin. Any load at the VOUT pin is provided by the battery through the internal ideal diode. When this input is grounded, the input current limit will be set to desired value as determined by the state of the HPWR pin. This pin has a conditional internal pull-down resistor when power is applied to the VBUS pin. VBUS (Pin 20): USB Input Voltage. VBUS will usually be connected to the USB port of a computer or a DC output wall adapter. VBUS should be bypassed with a low imped- ance multilayer ceramic capacitor. Exposed Pad (Pin 21): Ground. The exposed package pad is ground and must be soldered to the PC board for proper functionality and for maximum heat transfer. |
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