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LTC3554EPD Datasheet(PDF) 31 Page - Linear Technology |
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LTC3554EPD Datasheet(HTML) 31 Page - Linear Technology |
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31 / 36 page ![]() LTC3554 31 3554f Holding ON low through the one second power-down period will not cause a power-up event at end of the one second period. ON must be brought high following the power-down event and then go low again for 400ms to establish a valid power-up event, as shown in Figure 12. The regulators in Figure 13 are slewing up with nominal output capacitors and no-load. Adding a load or increas- ing output capacitance on any of the outputs will reduce the slew rate and lengthen the time it takes the regulator to get into regulation. OPERATION BAT VBUS ON (PB) PBSTAT BUCK1 BUCK2 PGOOD PWR_ON1 PWR_ON2 STATE PON PUP1 HR PDN1 3554 TD06 400ms 50ms 5s 1s 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 VOUT2 0.5V/DIV VOUT1 1V/DIV 0V 0V 3554 F13 100μs/DIV Figure 13. Power-Up Sequencing Figure 12. Hard Reset Via Holding ON Low for 5s LAYOUT AND THERMAL CONSIDERATIONS Printed Circuit Board Power Dissipation In order to be able to deliver maximum charge current under all conditions, it is critical that the Exposed Pad on the backside of the LTC3554 package is soldered to a ground plane on the board. Correctly soldered to a 2500mm2 ground plane on a double-sided 1oz copper board, the LTC3554 has a thermal resistance (θJA) of approximately 70°C/W. Failure to make good thermal contact between the Exposed Pad on the backside of the package and an adequately sized ground plane will result in thermal resistances far greater than 70°C/W. The conditions that cause the LTC3554 to reduce charge current due to the thermal protection feedback can be approximated by considering the power dissipated in the part. For high charge currents the LTC3554 power dis- sipation is approximately: PD = (VBUS–BAT) • IBAT + PD(REGS) where PD is the total power dissipated, VBUS is the supply voltage, BAT is the battery voltage, and IBAT is the battery charge current. PD(REGS) is the sum of power dissipated on chip by the step-down switching regulators. Power-Up Sequencing Figure 13 shows the actual power-up sequencing of the LTC3554. Buck1 and buck2 are both initially disabled (0V). Once the pushbutton has been applied (ON low) for 400ms buck1 is enabled. Buck1 slews up and enters regulation. The actual slew rate is controlled by the soft start func- tion of buck1 in conjunction with output capacitance and load (see the Step-Down Switching Regulator Operation section for more information). When buck1 is within about 8% of final regulation, buck2 is enabled and slews up into regulation. 230ms after buck2 is within 8% of final regulation, the PGOOD output will go high impedance. |
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