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TMC22091 Datasheet(PDF) 19 Page - Cadeka Microcircuits LLC. |
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TMC22091 Datasheet(HTML) 19 Page - Cadeka Microcircuits LLC. |
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19 / 60 page ![]() PRODUCT SPECIFICATION TMC22091/TMC22191 19 Control Register Definitions (continued) Miscellaneous Control Register (0E) 7 6 5 4 3 2 1 0 EFEN COMPD/A SVIDD/A FKREN RATIO TFLK T512 CB100 Reg Bit Name Function 0E 7 EFEN Register 0E and 0F enable. When LOW, the functions of Register 0E and 0F are disabled. When HIGH, Registers 0E and 0F are active. When Registers 0E and 0F are enabled, Register 00 bit 3 is ignored. Register 0E bit 7 will read back whatever value was written. 0E 6 COMPD/A COMPOSITE D/A disable. When HIGH, the COMPOSITE D/A converter is powered-down. When LOW, the D/A is enabled. 0E 5 SVIDD/A LUMA/CHROMA D/A disable. When HIGH, the LUMA and CHROMA D/A converters are powered-down. When LOW, they are enabled. 0E 4 FKREN Luminance processing enable. When FKREN is HIGH, the KEY input defines the function of CVBS input data. When the KEY input is HIGH, CVBS data is keyed over PD input data. When KEY is LOW, CVBS data is assumed to be luminance data delayed by one When FKREN is LOW, the KEY input operates normally, switching between CVBS and PD data. 0E 3 RATIO Luminance ratio control bit. When LOW, 1/2 of current luminance and 1/2 of field delayed luminance from the CVBS input are added to yield a new combined luminance value. When RATIO is HIGH, 3/4 of current luminance is added to 1/4 of the delayed luminance to produce a new luminance value. 0E 2 TFLK Luminance-pass threshold. The difference between current luminance and delayed luminance (from the CVBS inputs) is compared against a preset threshold set by TFLK. When TFLK is LOW, the high threshold must be exceeded to trigger the combining of current and delayed luminance (according to RATIO). If the higher threshold is not exceeded, current luminance is passed without modification. When TFLK is HIGH, a lower threshold is used to trigger the combining of current and delayed luminance. 0E 1 T512 EH/SL offset control bit. When LOW, the true value of EH and SL is offset by 256. When HIGH, the true value for EH and SL is offset by 512. 0E 0 CB100 NTSC/PAL color bars select. When HIGH, color bars with 100% white level are selected. When LOW, color bars will have 75% white level. |
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