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TMC22091 Datasheet(PDF) 22 Page - Cadeka Microcircuits LLC.

Part # TMC22091
Description  Digital Video Encoders/Layering Engine
PDF  60 Pages
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Manufacturer  CADEKA [Cadeka Microcircuits LLC.]
Direct Link  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

TMC22091 Datasheet(HTML) 22 Page - Cadeka Microcircuits LLC.

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TMC22091/TMC22191
PRODUCT SPECIFICATION
22
Control Register Definitions (continued)
Subcarrier Registers (20-27)
Reg
Bit
Name
Function
20
7-0
FREQL
Subcarrier frequency 4th byte (LSBs). This 8-bit register holds the LSB (bits
7-0) of the 32-bit subcarrier frequency value (non-genlock modes). The next
eight most significant bits are held in Register 21.
21
7-0
FREQ3
Subcarrier frequency 3rd byte. This 8-bit register holds bits 15:8 of the
subcarrier frequency value (non-genlock modes). The next eight most
significant bits are held in Register 22.
22
7-0
FREQ2
Subcarrier frequency 2nd byte. This 8-bit register holds bits 23-16 of the
subcarrier frequency value (non-genlock modes). The eight MSBs are held in
Register 23.
23
7-0
FREQM
Subcarrier frequency 1st byte (MSBs). This 8-bit register holds the MSBs (bits
31-24) of the 32-bit subcarrier frequency value (non-genlock modes).
24
7-0
SYSPHL
Video phase offset LSBs. This 8-bit register holds the 8 LSBs of color subcarrier
phase offset during active video.
25
7-0
SYSPHM
Video phase offset MSBs. This 8-bit register holds the 8 MSBs of color
subcarrier phase offset during active video.
26
7-0
BURPHL
Burst phase offset LSBs. This 8-bit register holds the 8 LSBs of burst phase
offset for color adjustment.
27
7-0
BURPHM
Burst phase offset MSBs. This 8-bit register holds the 8 MSBs of burst phase
for color adjustment.
Test I/O Register (40)
Reg
Bit
Name
Function
40
7-0
TESTDAT
Test data input/output. This 8-bit register holds MSBs or LSBs, as determined
by the Test Control Register. This control address does not auto-increment
during read or write operations. To exit the test mode, reset the Control
Register pointer by setting A1-0 and R/W LOW and then bring CS LOW.
Mask Register (50)
Reg
Bit
Name
Function
50
7-0
MASK
Mask register. This 8-bit register holds an 8-bit word that is logically ANDed with
the incoming data presented to the three CLUTs in color-index mode. This
register is a write-only register.
Y-Component Register (60)
Reg
Bit
Name
Function
60
7-0
Y
Y-component register. This register holds the contents of the luminance value
before the Sync and Blank Insert circuitry of the encoder. Loading the Control
Register pointer with 60h brings 8-bit Y values out on the D7-0 port.



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