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ADF4602

Rev. 0 | Page 28 of 36

Bit

Bit Name

Description

28, A1

Write

[15:4]

txpwr_set

Requested transmit power at antenna. LSB = 1/32 dBm, 0x000 = −80 dBm, 0xFFF = 47.96875 dBm.

The output power is referenced to a full scale sine wave applied to the transmit baseband inputs.

For WCDMA modulated signals, the output power measured in a 3.84 MHz bandwidth is reduced

by the peak to average ratio of the signal. See the I/Q Modulator section for more details. The valid

range of transmit output power setting is −80 dBm to +10 dBm. Output clipping may occur sooner,

depending on the PAR of the applied signal.

The txpwr_set register should be updated periodically, or with every 5°C change in temperature to

ensure accurate output power. See the VCO Output section for more details.

Set this bit to 1 to control the output power from the txpwr_set bits.

31, A1

Write

nvmld

Setting this bit to 1 triggers a manual load of the nonvolatile memory contents. See the Software

Initialization Procedure section for more details.

1 X = don’t care.

Table 13. Sub-Address Registers

Bit

Bit Name

Description

0.144, A2 Write

[2:1]

reserved[1:0]

These bits should be set to 11 for normal operation.

0.151, A2 Write

[7:0]

vsup2[7:0]

These bits control the VSUP2 regulator voltage and should be set to 0x6F for normal

operation. During the initialization sequence, the VSUP2 voltage is temporarily set to

3.1 V. See the Software Initialization Procedure section for more details.

0.153, A2 Write

[7:0]

reserved[7:0]

These bits should be set to 0x85 for normal operation.

0.155, A2 Write

[7:0]

reserved[7:0]

These bits should be set to 0x78 for normal operation.

0.165, A2 Write

[7:0]

reserved[7:0]

These bits should be set to 0x20 for normal operation.

0.170, A2 Write

[7:4]

en_mix[3:0]

These bits enable the I, IB, Q, and QB channels of the modulator separately. Set these bits

to all 1s to enable the modulator for normal operation.

0.171, A2 Write

buffstate

This bit controls the transmit VCO buffer state.

For transmit synthesizer frequencies > 2100 MHz (Band 1) the buffer state should be set

to 1, and the corresponding VCO buffer value in R0.174 should be set to 0x5F. This

ensures correct device operation for frequencies > 2100 MHz.

For operation below 2100 MHz (Band 2). the buffer state should be set to 0, and the

corresponding VCO buffer value in R0.174 should be set to 0x50. This ensures correct

device operation for frequencies < 2100 MHz.

0.174, A2 Write

[7:0]

buff_value[7:0]

These bits should be set to 0x5F for transmit frequencies >2100 MHz, and 0x50 for

transmit frequencies <2100 MHz. See the description for Register 0.171 for more.

0.175, A2 Write

[7:0]

reserved[7:0]

These bits should be set to 0x14 for normal operation.

ADF4602 Datasheet(PDF) 28 Page - Analog Devices

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