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ADF4602 Datasheet(PDF) 30 Page - Analog Devices

Part # ADF4602
Description  Single-Chip, Multiband 3G Femtocell Transceiver
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADF4602 Datasheet(HTML) 30 Page - Analog Devices

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ADF4602
Rev. 0 | Page 30 of 36
Nonvolatile Memory (NVM) Initialization
The ADF4602 has on-chip non-volatile memory (NVM) that
contains chip factory calibration coefficients. A soft reset of the
device transfers the contents of NVM to internal registers; however,
this has been found to be unreliable if performed at temperatures
below 0°C. The software work-around outlined in Step 2 to Step 5
of Table 14 ensures that the NVM data is transferred reliably
under all operating conditions. It involves setting the VSUP2
on-chip regulator to 3.1 V, manually transferring the data by
setting the nvmld bit in Register 31, and then resetting the
VSUP2 regulator to 2.8 V. Device programming can then
continue as normal.
Programming Transmit and Receive frequencies
After initialization, the transmit/receive synthesizer frequencies
may need to be changed. To change the transmit frequency, write
the new frequency word to Register 26. When a new transmit
frequency is programmed, the transmit output power is auto-
matically turned off to prevent any unwanted transmissions as
the PLL locks. The user should wait 200 μs (time taken for PLL
to lock), and then set the output power to the desired value by
writing to Register 28.
If the user disables the transmit synthesizer, the transmit output
power must be turned off before reenabling the transmit
synthesizer. This is achieved by two means: setting Bit D5 in
Register 1 or setting the output power in Register 28 to a
minimum.
After reenabling the synthesizer, and then locking the synthesizer
to a frequency by programming the frequency word in Register 26,
the user can reenable the output power.
To change the receive frequency, simply program the new
frequency in Register 10, and wait 200 μs before using the
device as a transceiver. The receive gain is set at any time
(apart from during the 200 μs PLL locking transient).



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