ST7036 datasheet(43/70 Pages) SITRONIX

43 / 70 page

ST7036

V1.7a

2007/10/17

43/70

Interfacing to the MPU

The ST7036 can send data in two 4-bit operations/one 8-bit operation, serial 1 bit operation or fast I

2C operation,

thus allowing interfacing with 4-bit, 8-bit or I

2C MPU.

For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3

are disabled. The data transfer between the ST7036 and the MPU is completed after the 4-bit data has been

transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to DB7)

are transferred before the four low order bits (for 8-bit operation, DB0 to DB3). The busy flag must be

checked (one instruction) after the 4-bit data has been transferred twice. Two more 4-bit operations then

transfer the busy flag and address counter data.

Example of busy flag check timing sequence

Intel 8051 interface(4 Bit)

Functioning

DB7

Internal

operation

R/W

Busy flag check

Instruction write

IR7

IR3

AC3

Not

Busy

AC3

IR3

IR7

CSB

P1.0 to P1.3

P3.0

P3.1

P3.2

R/W

DB4 to DB7

COM1 to

COM16/24

SEG1 to

SEG100/80

100/80

16/24

Intel 8051 Serial

ST7036

P3.3

CSB

ST7036 Datasheet(PDF) 43 Page - Sitronix Technology Co., Ltd.

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