ST7576 datasheet(22/54 Pages) SITRONIX

22 / 54 page

ST7576

Ver 1.0

22/54

2007/01/29

Data Transfer

The ST7576 uses bus holder and internal data bus for data transfer with the MPU. When writing data from the MPU

to on-chip RAM, data is automatically transferred from the bus holder to the RAM as shown in Fig. 11. And when reading

data from on-chip RAM to the MPU, the data for the initial read cycle is stored in the bus holder (dummy read) and the MPU

reads this stored data from bus holder for the next data read cycle as shown in Fig. 12. This means that a dummy read

cycle must be inserted between each pair of address sets when a sequence of address sets is executed. Therefore, the

data of the specified address cannot be output with the read display data instruction right after the address sets, but can be

output at the second read of data.

Fig 10 I

2C Interface protocol

Last control byte to be sent. Only a stream of data bytes is allowed to follow.

This stream may only be terminated by s STOP or RE-START condition.

Another control byte will follow the data byte unless a STOP or RE-START condition is received.

D(N)

D(N+1) D(N+2)

D(N+3)

D(N)

D(N+1) D(N+2)

D(N+3)

N+1

N+2

N+3

MPU signal

/WR

D0 to D7

Internal signals

/WR

BUS HOLDER

COLUMN ADDRESS

Fig 11 Write Timing

ST7576 Datasheet(PDF) 22 Page - Sitronix Technology Co., Ltd.