ST7576 datasheet(23/54 Pages) SITRONIX

23 / 54 page

ST7576

Ver 1.0

23/54

2007/01/29

DISPLAY DATA RAM (DDRAM)

The ST7576 contains a 66X102 bit static RAM that stores the display data. The display data RAM store the dot data for the

LCD. It has a 66(8 pageX8 bit +1 pageX1 bit +1 pageX1 bit) X 102 . There is a direct correspondence between X-address

and column output number. It is 66-row by 102-column addressable array. Each pixel can be selected when the page and

column addresses are specified. The 65 rows are divided into 8 pages of 8 lines (0~63 COM) and 8th page with single line

(D0)(64COM) and 9th page with a single line (D0)(COMS (ICOM). Data is read from or written to the 8 lines of each page

directly through D0 to D7. The display data of D0 to D7 from the microprocessor correspond to the LCD common lines. The

microprocessor can read from and write to RAM through the I/O buffer. Since the LCD controller operates independently,

data can be written into RAM at the same time as data is being displayed without causing the LCD flicker.

Page Address Circuit

This circuit is for providing a Page Address to Display Data RAM. It incorporates 4-bit Page Address register changed by

only the “Set Page” instruction. Page Address 9 is a special RAM area for the icons and display data D0 is only valid.

Line Address Circuit

This circuit assigns DDRAM a Line Address corresponding to the first line (COM0) of the display. Therefore, by setting Line

Address repeatedly, it is possible to realize the screen scrolling and page switching without changing the contents of

on-chip RAM as shown in Fig. 10. It incorporates 7-bit Line Address register changed by only the initial display line

instruction and 7-bit counter circuit. At the beginning of each LCD frame, the contents of register are copied to the line

counter which is increased by CL signal and generates the line address for transferring the 102-bit RAM data to the display

data latch circuit. When icon is selected by setting icon page address, display data of icons are not scrolled because the

MPU cannot access Line Address of icons.

Dummy

D(N)

D(N+1)

MPU signal

/WR

D0 to D7

Internal signals

/WR

COLUMN ADDRESS

/RD

D(N)

D(N+1) D(N+2)

D(N)

D(N+1) D(N+2)

/RD

BUS HOLDER

Fig 12 Read Timing

ST7576 Datasheet(PDF) 23 Page - Sitronix Technology Co., Ltd.