AS8228 datasheet(81/123 Pages) AMSCO

81 / 123 page

Data Sheet AS8218 / AS8228

Revision 3.0, 31-May-06

Page 81 of 123

Hex

Code

Mnemonic

Operands

B/C

Hex

Code

Mnemonic

Operands

B/C

PUSH

dir

2/1

MOVX

A, @DPTR

2/2

AJMP

code addr

2/2

AJMP

code addr

2/2

CLR

bit addr

2/1

MOVX

A, @R0

2/2

CLR

1/1

MOVX

A, @R1

2/2

SWAP

1/1

CLR

1/1

XCH

A, dir

2/1

MOV

A, dir

2/1

XCH

A, @R0

1/1

MOV

A, @R0

1/1

XCH

A, @R1

1/1

MOV

A, @R1

1/1

XCH

A, R0

1/1

MOV

A, R0

1/1

XCH

A, R1

1/1

MOV

A, R1

1/1

XCH

A, R2

1/1

MOV

A, R2

1/1

XCH

A, R3

1/1

MOV

A, R3

1/1

XCH

A, R4

1/1

MOV

A, R4

1/1

XCH

A, R5

1/1

MOV

A, R5

1/1

XCH

A, R6

1/1

MOV

A, R6

1/1

XCH

A, R7

1/1

MOV

A, R7

1/1

POP

dir

2/1

MOVX

@DPTR, A

1/2

ACALL

code addr

2/2

ACALL

code addr

2/2

SETB

bit addr

2/1

MOVX

@R0, A

1/2

SETB

1/1

MOVX

@R1, A

1/2

1/1

CPL

1/1

DJNZ

dir, code addr

3/2

MOV

dir, A

2/1

XCHD

A, @R0

1/1

MOV

@R0, A

1/1

XCHD

A, @R1

1/1

MOV

@R1, A

1/1

DJNZ

R0, code addr

2/2

MOV

R0, A

1/1

DJNZ

R1, code addr

2/2

MOV

R1, A

1/1

DJNZ

R2, code addr

2/2

MOV

R2, A

1/1

DJNZ

R3, code addr

2/2

MOV

R3, A

1/1

DJNZ

R4, code addr

2/2

MOV

R4, A

1/1

DJNZ

R5, code addr

2/2

MOV

R5, A

1/1

DJNZ

R6, code addr

2/2

MOV

R6, A

1/1

DJNZ

R7, code addr

2/2

MOV

R7, A

1/1

dir .............. variable in I_RAM

code addr ... address in code memory

data ........... immediate data

bit addr....... address of a bit in bit-addressable I_RAM

Notes:

1) ‘B’ = number of bytes

‘C’ = number of cycles

2) Optimised execution in a single cycle; normally 2 cycles

Addressing Modes

The MCU comprises all standard 8051 addressing modes. For completeness they are listed here. There are

five types. In two byte instructions the destination is specified first, then the source.

Mode

Examples

Notes

MOV A, R0

selected

Direct addressing

MOV R0, A

Moves contents of A to R0

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