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AS8228 Datasheet(PDF) 94 Page - ams AG |
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AS8228 Datasheet(HTML) 94 Page - ams AG |
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94 / 123 page  Data Sheet AS8218 / AS8228 Revision 3.0, 31-May-06 Page 94 of 123 Watchdog Timer Clock Register (WDTCLK) MSB LSB - - - - - - WDTCLK1 WDTCLK0 Bit Symbol Function 7 - Not used 6 - Not used 5 - Not used 4 - Not used 3 - Not used 2 - Not used Clock Source Timeout Period (ms) Bit1 Bit0 Mclk – default after reset 73.2 0 0 1 WDTCLK1 Mclk 292.8 0 1 Mclk 1171.2 1 0 Mcu_clk (div=1) 73.2 0 WDTCLK0 Watchdog timeout period (Mclk = 3.579545MHz) Mcuclk (div=128) 9300 1 1 2 nd UART (UART2) An additional serial interface, UART2 is provided for debugging purposes. UART2 is accessible via two of the multi-purpose I/Os (MPIO). The UART2 is functionally identical to UART1. The SFR addresses are defined as follows: Register Name Address Description SCON2 C0h Serial port control register – see Serial Interface – UART1 for details. SBUF2 C1h Serial port buffer register – see Serial Interface – UART1 for details. SBAUDL2 C2h Baudrate reload register – Low address SBAUDH2 C3h Baudrate reload register – High address SOVR2 B0h ‘Serial overflow’ register, which indicates when data in SBUF has been overwritten before being read. The flag is the LSB with the other 7 bits all being 0. Below is an example how to configure the ports IO7 and IO6 as UART2s txd2 (IO7) and rxd2 (IO6) pins. ;------------------------------------------------------------------------------- ; Configure UART2 to the pins IO6 and IO7 with the Baudrate of 19200 Baud: ;------------------------------------------------------------------------------- ; map txd2 = IO7 ; map rxd2 = IO6 ;------------------------------------------------------------------------------- xdata mem: OUTMUX1 (9503h) <- 80h ; maps txd2 to IO7 xdata mem: SET_ENO (9505h) <- 80h ; enable output IO7 xdata mem: SEL_PUPDO (9509h) <- 40h ; enable pullup for IO6 xdata mem: SEL_IN (950Bh) <- 05h ; map rxd2 to IO6 idata mem: SBAUDL2 (0C2) <- 11h ; set Baudrate register low idata mem: SBAUDH2 (0C3) <- 00h ; set Baudrate register high idata mem: SCON2 (0C0) <- 50h ; setup UART2 serial port for Rx and Tx. ;------------------------------------------------------------------------------- |
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