AMPL138ZCE3 datasheet(35/268 Pages) TI

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3.9.6

DDR2 Controller (DDR2)

OMAP-L138 Low-Power Applications Processor

www.ti.com

SPRS586A – JUNE 2009 – REVISED AUGUST 2009

Table 3-9. DDR2 Controller (DDR2) Terminal Functions

SIGNAL

TYPE(1)

PULL(2)

DESCRIPTION

NAME

NO.

DDR_D[15]

W10

I/O

IPD

DDR_D[14]

U11

I/O

IPD

DDR_D[13]

V10

I/O

IPD

DDR_D[12]

U10

I/O

IPD

DDR_D[11]

T12

I/O

IPD

DDR_D[10]

T10

I/O

IPD

DDR_D[9]

T11

I/O

IPD

DDR_D[8]

T13

I/O

IPD

DDR2 SDRAM data bus

DDR_D[7]

W11

I/O

IPD

DDR_D[6]

W12

I/O

IPD

DDR_D[5]

V12

I/O

IPD

DDR_D[4]

V13

I/O

IPD

DDR_D[3]

U13

I/O

IPD

DDR_D[2]

V14

I/O

IPD

DDR_D[1]

U14

I/O

IPD

DDR_D[0]

U15

I/O

IPD

DDR_A[13]

IPD

DDR_A[12]

IPD

DDR_A[11]

IPD

DDR_A[10]

IPD

DDR_A[9]

IPD

DDR_A[8]

IPD

DDR_A[7]

IPD

DDR2 row/column address

DDR_A[6]

IPD

DDR_A[5]

IPD

DDR_A[4]

IPD

DDR_A[3]

IPD

DDR_A[2]

IPD

DDR_A[1]

IPD

DDR_A[0]

IPD

DDR_CLKP

IPD

DDR2 clock (positive)

DDR_CLKN

IPD

DDR2 clock (negative)

DDR_CKE

IPD

DDR2 clock enable

DDR_WE

IPD

DDR2 write enable

DDR_RAS

IPD

DDR2 row address strobe

DDR_CAS

IPD

DDR2 column address strobe

DDR_CS

IPD

DDR2 chip select

DDR_DQM[0]

W13

IPD

DDR2 data mask outputs

DDR_DQM[1]

R10

IPD

(1)

I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.

Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name

highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured

function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different

types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.

(2)

IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using

the PUPDENA and PUPDSEL registers in the System Module.

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