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AMPL138ZCE3 Datasheet(PDF) 80 Page - Texas Instruments |
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AMPL138ZCE3 Datasheet(HTML) 80 Page - Texas Instruments |
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80 / 268 page  PLLDIV1(/1) SYSCLK1 PLLDIV2(/2) SYSCLK2 PLLDIV4(/4) SYSCLK4 PLLDIV5(/3) SYSCLK5 PLLDIV6(/1) SYSCLK6 PLLDIV7(/6) SYSCLK7 DIV4.5 1 0 EMIFA Internal Clock Source CFGCHIP3[EMA_CLKSRC] 1 0 PREDIV PLLM 1 0 CLKIN OSCIN PLL1_SYSCLK3 PLLCTL[EXTCLKSRC] AUXCLK PLL PLLDIV3(/3) SYSCLK3 DDR2/mDDR Internal Clock Source PLLDIV2(/2) PLLDIV3(/3) PLLDIV1(/1) 0 1 PLLCTL[PLLEN] POSTDIV PLLM PLL 0 1 PLLCTL[PLLEN] PLLCTL[CLKMODE] POSTDIV OBSCLK (OBSCLKPin) DIV4.5 OSCDIV PLL Controller0 PLL Controller1 SYSCLK2 SYSCLK3 SYSCLK1 OMAP-L138 Low-Power Applications Processor SPRS586A – JUNE 2009 – REVISED AUGUST 2009 www.ti.com Figure 6-9. PLL Topology Peripheral Information and Electrical Specifications 80 Submit Documentation Feedback |
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