AMPL138ZCE3 datasheet(130/268 Pages) TI

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6.13.2 SATA Design Considerations

OMAP-L138 Low-Power Applications Processor

SPRS586A – JUNE 2009 – REVISED AUGUST 2009

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Table 6-41. SATA Controller Registers (continued)

BYTE ADDRESS

ACRONYM

0x01E1 8114

P0IE

Port Interrupt Enable Register

0x01E1 8118

P0CMD

Port Command Register

0x01E1 8120

P0TFD

Port Task File Data Register

0x01E1 8124

P0SIG

Port Signature Register

0x01E1 8128

P0SSTS

Port Serial ATA Status Register

0x01E1 812C

P0SCTL

Port Serial ATA Control Register

0x01E1 8130

P0SERR

Port Serial ATA Error Register

0x01E1 8134

P0SACT

Port Serial ATA Active Register

0x01E1 8138

P0CI

Port Command Issue Register

0x01E1 813C

P0SNTF

Port Serial ATA Notification Register

0x01E1 8170

P0DMACR

Port DMA Control Register

0x01E1 8178

P0PHYCR

Port PHY Control Register

0x01E1 817C

P0PHYSR

Port PHY Status Register

The electrical behavior of the SATA interface conforms to the SATA specification and as such will not be

included in this datasheet. A future revision of this datasheet will include design and layout

recommendations to meet the SATA specification requirements.

130

Peripheral Information and Electrical Specifications

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