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SC68C652B Datasheet(PDF) 41 Page - NXP Semiconductors

Part # SC68C652B
Description  5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs, IrDA encoder/decoder, and 68 mode mP interface
PDF  43 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC68C652B Datasheet(HTML) 41 Page - NXP Semiconductors

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SC68C652B_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 2 November 2009
41 of 43
NXP Semiconductors
SC68C652B
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
14. Revision history
Table 33.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
SC68C652B_2
20091102
Product data sheet
-
SC68C652B_1
Modifications:
• The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Data sheet title modified from “... and Motorola
µP interface” to “... and 68 mode µP interface”
• Section 2 “Features”, 3rd bullet item re-written; added Footnote 1
• Table 10 “Interrupt Enable Register bits description”, description of bit 0: changed from “In the
68C450 mode” to “In the 16C450 mode”
• Table 11 “FIFO Control Register bits description”, description of bit 3: changed from “in the
68C450 mode” to “in the 16C450 mode” (in 2 places)
• Table 27 “Limiting values”:
– Symbol Vn split to show 2 separate conditions: “at D7 to D0 pins” and “at input only pins”
– Symbol “Ptot(pack)” changed to “Ptot/pack”
– Parameter for Tamb changed from “operating temperature” to “ambient temperature”;
“operating” moved to Conditions column
• Table 28 “Static characteristics”:
– Descriptive line below table title changed from “VCC = 2.5 V, 3.3 V ± 10 % or 5 V ± 10 %” to
“tolerance of VCC ± 10 %”
– Symbol/parameter changed from “VIL(CK), LOW-level clock input voltage” to “VIL(clk), clock
LOW-level input voltage”
– Symbol/parameter changed from “VIH(CK), HIGH-level clock input voltage” to “VIH(clk), clock
HIGH-level input voltage”
– Symbol changed from “ICL” to “IL(clk)”
– Parameter for ICC(sleep) changed from “sleep current” to “sleep mode supply current”
• Table 29 “Dynamic characteristics”:
– Descriptive line below table title changed from “VCC = 2.5 V, 3.3 V ± 10 % or 5 V ± 10 %” to
“tolerance of VCC ± 10 %”
– Symbol/parameter “t1w, t2w, clock cycle period” is split into “tWH, pulse width HIGH” and
“tWL, pulse width LOW”
– Table note [3]: denominator in equation changed from “t3w” to “tw(clk)”
– added Table note [4] and its reference at t(RESET)
• Figure 8 “External clock timing”:
– “tw2” changed to “tWL”
– “tw1” changed to “tWH”
– “tw3” changed to “tw(clk)”
• Updated soldering information
SC68C652B_1
(9397 750 14657)
20050425
Product data sheet
-
-



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