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HCS12 Datasheet(PDF) 110 Page - Freescale Semiconductor, Inc |
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HCS12 Datasheet(HTML) 110 Page - Freescale Semiconductor, Inc |
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110 / 452 page ![]() S12CPUV2 Reference Manual, Rev. 4.0 110 Freescale Semiconductor Operation: (CCR) • (Mask) ⇒ CCR Description: Performs bitwise logical AND between the content of a mask operand and the content of the CCR. The result is placed in the CCR. After the operation is performed, each bit of the CCR is the result of a logical AND with the corresponding bits of the mask. To clear CCR bits, clear the corresponding mask bits. CCR bits that correspond to ones in the mask are not changed by the ANDCC operation. If the I mask bit is cleared, there is a 1-cycle delay before the system allows interrupt requests. This prevents interrupts from occurring between instructions in the sequences CLI, WAI and CLI, STOP (CLI is equivalent to ANDCC #$EF). Condition code bits are cleared if the corresponding bit was 0 before the operation or if the corresponding bit in the mask is 0. ANDCC Logical AND CCR with Mask ANDCC CCR Details: S X HIN Z V C ⇓⇓⇓⇓⇓⇓⇓⇓ Source Form Address Mode Object Code Access Detail HCS12 M68HC12 ANDCC #opr8i IMM 10 ii P P |
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