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HCS12 Datasheet(PDF) 141 Page - Freescale Semiconductor, Inc |
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HCS12 Datasheet(HTML) 141 Page - Freescale Semiconductor, Inc |
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141 / 452 page  S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 141 Operation: (SP) – $0002 ⇒ SP RTNH : RTNL ⇒ M(SP) : M(SP+1) (PC) + Rel ⇒ PC Description: Sets up conditions to return to normal program flow, then transfers control to a subroutine. Uses the address of the instruction after the BSR as a return address. Decrements the SP by two, to allow the two bytes of the return address to be stacked. Stacks the return address (the SP points to the high-order byte of the return address). Branches to a location determined by the branch offset. Subroutines are normally terminated with an RTS instruction, which restores the return address from the stack. BSR Branch to Subroutine BSR CCR Details: S X HIN Z V C –––––––– Source Form Address Mode Object Code Access Detail HCS12 M68HC12 BSR rel8 REL 07 rr SPPP PPPS |
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