HCS12 datasheet(164/452 Pages) FREESCALE

164 / 452 page

Instruction Glossary

S12CPUV2 Reference Manual, Rev. 4.0

164

Freescale Semiconductor

Operation:

(M) – $01

⇒ M

Description:

Subtract one from the content of memory location M.

The N, Z, and V status bits are set or cleared according to the results of the

operation. The C status bit is not affected by the operation, thus allowing the

DEC instruction to be used as a loop counter in multiple-precision

computations.

DEC

Decrement Memory

DEC

CCR Details:

HIN

––––

∆∆∆

–

Set if MSB of result is set; cleared otherwise

Set if result is $00; cleared otherwise

Set if there was a two’s complement overflow as a result of the

operation; cleared otherwise. Two’s complement overflow occurs if

and only if (M) was $80 before the operation.

Source Form

Address

Mode

Object Code(1)

1. Encoding for lb is summarized in the following table. Bit 3 is not used (don’t care), bit 5 selects branch on zero (DBEQ – 0)

or not zero (DBNE – 1) versions, and bit 4 is the sign bit of the 9-bit relative offset. Bits 7 and 6 would be 0:0 for DBNE.

Access Detail

HCS12

M68HC12

DEC opr16a

DEC oprx0_xysp

DEC oprx9,xysp

DEC oprx16,xysp

DEC [D,xysp]

DEC [oprx16,xysp]

EXT

IDX

IDX1

IDX2

[D,IDX]

[IDX2]

73 hh ll

63 xb

63 xb ff

63 xb ee ff

63 xb

63 xb ee ff

rPwO

rPw

rPwO

frPwP

fIfrPw

fIPrPw

rOPw

rPw

rPOw

frPPw

fIfrPw

fIPrPw

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