ADS1246 datasheet(32/66 Pages) TI

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CalibrationTime=

OSC

MOD

DATA

ADS1246

ADS1247

ADS1248

SBAS426D – AUGUST 2008 – REVISED MARCH 2010

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calibrations the offset calibration register (OFC) is

ADC SLEEP MODE

updated afterwards. When either offset calibration

Power consumption can be dramatically reduced by

command is issued, the ADS1246/7/8 stop the

placing the ADS1246/7/8 into sleep mode. There are

current conversion and start the calibration procedure

two ways to put the device into sleep mode: the sleep

immediately.

command (SLEEP) and through the START pin.

Calibration Timing

During sleep mode, the internal reference status

depends on the setting of the VREFCON bits in the

When calibration is initiated, the device performs 16

MUX1 register; see the Register Descriptions section

consecutive data conversions and averages the

for details.

results

calculate

the

calibration

value.

This

provides a more accurate calibration value. The time

ADC CONTROL

required for calibration is shown in Table 18 and can

be calculated using Equation 8:

ADC Conversion Control

The START pin provides easy and precise control of

(8)

conversions. Pulse the START pin high to begin a

conversion, as shown in Figure 64 and Table 19. The

Table 18. Calibration Time versus Data Rate

conversion

completion

indicated

the

DATA RATE (SPS)

CALIBRATION TIME (ms)

DOUT/DRDY pin going low. When the conversion

completes, the ADS1246/7/8 automatically shuts

3201.01

down

save

power.

During

shutdown,

the

1601.01

conversion result can be retrieved; however, START

801.012

must be taken high before communicating with the

400.26

configuration registers. The device stays shut down

200.26

until the START pin is once again taken high to begin

a new conversion. When the START pin is taken

160

100.14

back high again, the decimation filter is held in a

320

50.14

reset state for 32 modulator clock cycles internally to

640

25.14

allow the analog circuits to settle.

1000

16.14

The ADS1246/7/8 can be configured to convert

2000

8.07

continuously by holding the START pin high, as

shown in Figure 65. With the START pin held high,

1. For fOSC = 4.096MHz.

the ADC converts the selected input channels

continuously. This configuration continues until the

ADC POWER-UP

START pin is taken low.

When DVDD is pulled up, the internal power-on reset

The START pin can also be used to perform the

module generates a pulse that resets all digital

synchronized measurement for the multi-channel

circuitry. All the digital circuits are held in a reset

applications by pulsing the START pin.

state for 216 system clocks to allow the analog circuits

and the internal digital power supply to settle. SPI

communication cannot occur until the internal reset is

released.

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ADS1246 Datasheet(PDF) 32 Page - Texas Instruments

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