TAS5715PHPR datasheet(57/74 Pages) TI

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TAS5715

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SLOS645 – AUGUST 2010

VOLUME CONFIGURATION REGISTER (0x0E)

Bits

Volume slew rate (Used to control volume change and MUTE ramp rates). These bits control the

D2–D0:

number of steps in a volume ramp. Volume steps occur at a rate that depends on the sample rate of

the I2S data as follows:

Sample rate (KHz)

Approximate ramp rate

8/16/32

125 ms/step

11.025/22.05/44.1

90.7 ms/step

12/24/48

83.3 ms/step

Table 13. Volume Control Register (0x0E)

FUNCTION

–

Reserved (1)

–

Volume slew 512 steps (43 ms volume ramp time at 48 kHz)(1)

–

Volume slew 1024 steps (85 ms volume ramp time at 48 kHz)

–

Volume slew 2048 steps (171 ms volume ramp time at 48 kHz)

–

Volume slew 256 steps (21 ms volume ramp time at 48 kHz)

–

Reserved

(1)

Default values are in bold.

DC DETECT CONTROL REGISTER (0x0F)

Table 14. DC Detect Control Register (0x0F)(1)

Magnitude

MAX +

MAX –

–

52.73%

47.27%

–

55.86%

44.14%

–

58.98%

41.02%

–

62.11%

37.89%

–

65.23%

34.77%

–

68.36%

31.64%

–

71.48%

28.52%

–

74.61%

25.39%

–

77.73%

22.27%

–

80.86%

19.14%

–

83.98%

16.02%

–

87.11%

12.89%

–

103

90.23%

9.77%

–

111

93.36%

6.64%

–

119

96.48%

3.52%

–

127

99.61%

0.39%

Time, ms

–

157.1

–

314.2

–

471.3

–

628.4

–

785.5

–

942.6

–

1099.7

(1)

See register 0x46, bit D10 for enable/disable control of this feature.

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