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TLE5012 Datasheet(PDF) 44 Page - Infineon Technologies AG |
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TLE5012 Datasheet(HTML) 44 Page - Infineon Technologies AG |
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44 / 57 page ![]() TLE5012 Specification Target Data Sheet 44 V 0.46, 2009-09 Interface Mode4 Register MOD_4 Offset Reset Value Interface Mode4 Register 0EH 0000H Field Bits Type Description TCO_X_T 15:9 rw Offset Temperature Coefficient for X-Component Reset: 0H HSM_PLP 7:5 rw Hall Switch Mode; Polepair Configuration 000B 2 pole pairs 001B 3 pole pairs (default within TLE5012-E0318) 010B 4 pole pairs 011B 6 pole pairs 100B 7 pole pairs (default within TLE5012-E0742) 101B 8 pole pairs 110B 12 pole pairs 111B 16 pole pairs Reset: 000B IFAB_RES 4:3 rw IFAB Resolution 00B 12bit = 0.088° (244Hz) 01B 11bit = 0.176° (488Hz) 10B 10bit = 0.352° (977Hz) 11B 9bit = 0.703° (1953Hz) Reset: 00B IF_MD 2:0 rw Interface Mode PWM, HSM if CLK is connected to GND at startup. Note: Not mentioned combinations are not allowed 000B SSC mode; IIF 001B SSC mode; PWM 010B SSC mode; HSM (default within TLE5012-E0318 and TLE5012-E0742) Reset: 000B |
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