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ADRF6801 Datasheet(PDF) 24 Page - Analog Devices

Part # ADRF6801
Description  750 MHz to 1150 MHz Quadrature Demodulator with Fractional-N PLL and VCO
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADRF6801 Datasheet(HTML) 24 Page - Analog Devices

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ADRF6801
Rev. 0 | Page 24 of 36
EVALUATION BOARD LAYOUT AND THERMAL GROUNDING
An evaluation board is available for testing the ADRF6801. The
evaluation board schematic is shown in Figure 42. Table 5 provides
the component values and suggestions for modifying the
component values for the various modes of operation.
40
39
38
37
36
35
34
33
32
31
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
21
22
23
24
25
26
27
28
29
30
RFIN
GND
GND
VCCBB
GND
GND
GNDRF
VCCRF
GND
VCCBB
MUXOUT
GND
RSET
DECL3
GND
CPOUT
VCC2
REFIN
VCC1
DECL2
ADRF6801
3P3V_SENSE
VCC4
VCO_LDO
0.1µF
100pF
CP
LO
VCC_LO
0.1µF
VCC_BB
100pF
VCC_RF
1nF
1nF
RFIN
100pF
VCC_BB
C14
22pF
C15
2.7nF
R10
3k
Ω
R9
QOUT_SE
0.1µF
100pF
VCC_LO
OUTPUT_EN
REFIN
REFOUT
2P5V
0
Ω
0
Ω
0
Ω
0
Ω
0
Ω
0
Ω
VCC2
NET NAME
LEGEND
TEST POINT
SMA INPUT/OUTPUT
49.9
Ω
1nF
R47
R48
R44
R43
R42
C29
0.1µF
P3
T1
R2
R8
C12
C11
C10
100pF
C9
0.1µF
R7
C27
100pF
C26
C24
R26
C25
R6
0
Ω
C8
100pF
C7
0.1µF
C6
C5
R37
R38
10k
Ω
C13
6.8pF
C4
22pF
VTUNE
R59
OPEN
R1
R12
R11
C1
100pF
C2
10µF
VCO_LDO
C31
R14
R16
R18
C16
100pF
C17
0.1µF
C3
10µF
2P5V_LDO
R17
VCC
C18
100pF
C19
0.1µF
123
45
67
8
9
OPEN
R58
OPEN
R50
OPEN
R19
OPEN
CLK
C32
R35
0
Ω
OPEN
R51
OPEN
C33
R30
DATA
OPEN
R52
OPEN
C34
R57
LE
R36
VTUNE
GND
GND1
GND2
C21
C20
R24
C22
C23
R25
VCC_RF
VCC_BB
VCC_SENSE
VCC
R29
R32
C28
10µF
OPEN
OPEN
OPEN
0
Ω
0
Ω
0
Ω
0
Ω
0
Ω
R21
R22
QBBP
QBBN
R23
OPEN
OPEN
IOUT_SE
R41
R40
R39
C30
0.1µF
0.1µF
0.1µF
T2
0
Ω
R4
2
4
5
1
3
IBBP
IBBN
R3
OPEN
OPEN
R46
OPEN
R45
R56
R55
10k
Ω
10k
Ω
VCC
S1
1
3
4
5 2
OPEN
R49
3P3V1
VCC4
VCC_LO1
VCC
DIG_GND
P1
VCC_BB1
VCC_RF
VCC_LO
VCC
R28
0
Ω
R60
10k
Ω
R33
0
Ω
LO_EXTERN
R15
0
Ω
S2
P2
R54
T3
2
4
5
1
3
0
Ω
0
Ω
0
Ω
0
Ω
VCC_LO
R31
0
Ω
VCC4
R13
0
Ω
0
Ω
R5
0
Ω
0
Ω
0
Ω
0
Ω
0
Ω
R20
0
Ω
R34
OPEN
10k
Ω
OPEN
0
Ω
R53
0
Ω
0
Ω
0
Ω
0
Ω
R27
0
Ω
0
Ω
J1
LO_EXTERN
OUTPUT_EN
OSC_3P3V
VCC_SENSE
VCO_LDO
2P5V_LDO
3P3V_SENSE
VCC
1
3
5
7
2
4
6
8
10
9
Figure 42. Evaluation Board Schematic



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