ADRF6801 datasheet(3/36 Pages) AD

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ADRF6801

Rev. 0 | Page 3 of 36

SPECIFICATIONS

VS = 5 V; ambient temperature (TA) = 25°C; fREF = 26 MHz, fLO = 900 MHz, fBB = 4.5 MHz, RLOAD = 450 Ω differential, all register and PLL

settings use the recommended values shown in the Register Structure section, unless otherwise noted.

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

RF INPUT AT 900 MHz

RFIN pins

Internal LO Frequency Range

With VCO amplitude = 63 (R6 [DB15 to DB10])

750

1125

MHz

With VCO amplitude = 24 (R6 [DB15 to DB10])

750

1150

MHz

Input Return Loss

Measured at 900 MHz

<−20

Input P1dB

12.5

dBm

Second-Order Input Intercept (IIP2)

−5 dBm each tone

>65

dBm

Third-Order Input Intercept (IIP3)

−5 dBm each tone

dBm

Noise Figure

Double sideband from RF to either I or Q output

14.3

With a −10 dBm interferer 5 MHz away

18.9

LO-to-RF Leakage

At 1×LO frequency, 50 Ω termination at the RF port

−75

dBm

I/Q BASEBAND OUTPUTS

IBBP, IBBN, QBBP, QBBN pins

Voltage Conversion Gain

450 Ω differential load across IBBP, IBBN (or QBBP, QBBN)

5.1

Demodulation Bandwidth

1 V p-p signal 3 dB bandwidth

275

MHz

Quadrature Phase Error

0.3

Degrees

I/Q Amplitude Imbalance

0.05

Output DC Offset (Differential)

±5

Output Common-Mode Voltage

VPOS − 2.4

Gain Flatness

Any 5 MHz (<100 MHz)

0.2

dB p-p

Maximum Output Swing

Differential 450 Ω load

V p-p

Differential 200 Ω load

2.4

V p-p

Maximum Output Current

Each pin

mA p-p

LO INPUT/OUTPUT

LOP, LON

Output Level

Into a differential 50 Ω load, LO buffer enabled (LO

frequency = 900 MHz, output frequency = 1800 MHz)

−2.5

dBm

Input Level

Externally applied 2×LO, PLL disabled

dBm

Input Impedance

Externally applied 2×LO, PLL disabled

VCO Operating Frequency

With VCO amplitude = 63 (R6 [DB15 to DB10])

3000

4500

MHz

With VCO amplitude = 24 (R6 [DB15 to DB10])

3000

4600

MHz

SYNTHESIZER SPECIFICATIONS

All synthesizer specifications measured with

recommended settings provided in Figure 33 through

Figure 39

Channel Spacing

fPFD = 26 MHz; modulus = 2047

kHz

PLL Bandwidth

Can be adjusted with off-chip loop filter component

values and RSET

130

kHz

SPURS

fLO = 900 MHz, fREF = 26 MHz, fPFD = 26 MHz, measured

at BB outputs with fBB = 50 MHz

Reference Spurs

fREF = 26 MHz, fPFD = 26 MHz

−91.6

dBc

fPFD/2

−107.8

dBc

fPFD × 2

−89.1

dBc

fPFD × 3

−94.2

dBc

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