| Electronic Components Datasheet Search |
|
MAX8939EWVT Datasheet(PDF) 21 Page - Maxim Integrated Products |
|
|
|||||||||||||||||||||||||||||
MAX8939EWVT Datasheet(HTML) 21 Page - Maxim Integrated Products |
|
21 / 43 page ![]() ______________________________________________________________________________________ 21 System Power Management for Mobile Handset turned on through the I2C interface. The guaranteed cur- rent drive capabilities for the LDOs are 400mA for LDO1, 200mA for LDO2 and LDO3, and 100mA for LDO4. The output voltage for each LDO is programmable through the I2C interface from 1.7V to 3.2V in 0.1V steps. LDO1 can be enabled through a hardware pin LDO1_EN. By connecting this pin to a logic-high level, the LDO enables automatically when the UVLO upper threshold is reached. The LDO can also be controlled by the LDO1_EN bit of the REG_CONTROL. When the LDO1_EN bit is written to, the LDO1 enable state reflects the value written, overriding the state of the LDO1_EN pin. When the state of the LDO1_EN pin changes, the LDO1 enable state is determined by the new state of the LDO1_EN pin, overriding the LDO1_EN bit value. This allows the system software to reduce quiescent power consumption by turning off LDO1 without impacting other logic that may utilize the same hardware control used for the LDO1_EN pin. Interrupt Request (IRQ) IRQ is an active-low, open-drain output signal (requires an external pullup resistor) that indicates that an interrupt event has occurred and that the event and status infor- mation are available in the event/status registers. Such information includes temperature and voltages inside the MAX8939, fault conditions, etc. The event registers hold information about events that have occurred in the MAX8939. Events are triggered by a status change in the monitored signals. When an event bit is set in the event register, the IRQ signal is asserted (unless IRQ is masked by a bit in the IRQ mask register). The IRQ is also masked during power-up and is not released until the event registers have been read. Each event register is reset to its initial condition after being read. The IRQ is not released until all the event registers have been read. New events that occur during read-out of the event reg- isters are held until all the event registers have been read to, ensuring that the host processor does not miss them. PWR_ON_CMP PWR_ON_CMP is an open-drain output used to wake-up a sleeping baseband. PWR_ON_CMP is activated when a charger is detected (VCHG_IN is between 4.1V and 10V) and the battery voltage is above the UVLO thresh- old. If the battery has already reached the UVLO upper threshold, the charger is detected by a rising edge. When such an event is detected, the MAX8939 starts pulsing the PWR_ON_CMP output every 50ms, with a duty cycle of 98%. See Figure 5. The event is also signaled by IRQ, which is asserted when the UVLO upper threshold is reached and the CHG_DET bit is set in register 0x04 (bit 6). The MAX8939 continues pulsing PWR_ON_CMP until the EVENT registers are read, then the register is cleared and PWR_ON_CMP and IRQ return to high impedance. The events causing the PWR_ON_CMP activation are triggered by a rising edge signal that must remain valid for the duration of a 10ms debounce filter. RESET_IN RESET_IN is an active-low input signal to the MAX8939 and is used to provide a full system reset inside the MAX8939. As long as RESET_IN is asserted, the MAX8939 is not able to do anything (except the charger), until RESET_IN is released. All registers are cleared except the STATUS and EVENT registers. When RESET_IN is asserted, the EVENT_B bit RESET is set. If the CHG_IN voltage is valid and RESET_IN is asserted, the charger operates in its default state. OUT1 Step-Up DC-DC Converter OUT1 is a fixed-frequency PWM step-up converter. The converter switches an internal power MOSFET and synchronous rectifier at a constant 2MHz frequency with varying duty cycle up to 75% to maintain constant out- put voltage as the input voltage and load current vary. Figure 5. Wake-Up Sequence 1ms 50ms UVLO UPPER THRESHOLD UVLO AND CHARGER DETECTION EVENT ALL EVENT REGISTERS ARE READ. PWR_ON_CMP AND IRQ ARE CLEARED CHARGER REMOVAL EVENT ALL EVENT REGISTERS ARE READ. IRQ IS CLEARED. VCHG_IN VBATT IRQ PWR_ON_CMP |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |