LPC1111 datasheet(35/64 Pages) NXP

35 / 64 page

LPC1111_12_13_14

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Product data sheet

Rev. 5 — 22 June 2011

35 of 64

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the

SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal

pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 9.

Sleep mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111x/101/201/301)

Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register

(PDSLEEPCFG = 0x0000 18FF).

Fig 10. Deep-sleep mode: Typical supply current IDD versus temperature for different

supply voltages VDD (for LPC111x/101/201/301)

002aaf392

temperature (

°C)

−40

−15

IDD

(mA)

12 MHz(1)

36 MHz(2)

48 MHz(2)

24 MHz(2)

002aaf394

temperature (

°C)

−40

−15

IDD

(

μA)

3.6 V

3.3 V

2.0 V

1.8 V

LPC1111 Datasheet(PDF) 35 Page - NXP Semiconductors

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