LPC1111 datasheet(37/64 Pages) NXP

37 / 64 page

LPC1111_12_13_14

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Product data sheet

Rev. 5 — 22 June 2011

37 of 64

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals

disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks

disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 12. Active mode: Typical supply current IDD versus supply voltage VDD for different

system clock frequencies (for LPC111x/102/202/302)

Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all peripherals

disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks

disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 13. Active mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111x/102/202/302)

VDD (V)

1.8

3.6

3.0

2.4

002aaf980

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

002aaf981

temperature (

°C)

−40

−15

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

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