LPC1111 datasheet(16/64 Pages) NXP

16 / 64 page

LPC1111_12_13_14

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Product data sheet

Rev. 5 — 22 June 2011

16 of 64

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

7.5 Nested Vectored Interrupt Controller (NVIC)

The Nested Vectored Interrupt Controller (NVIC) is an integral part of the Cortex-M0. The

tight coupling to the CPU allows for low interrupt latency and efficient processing of late

arriving interrupts.

7.5.1 Features

• Controls system exceptions and peripheral interrupts.

(1) LQFP48 package only.

Fig 4.

LPC1111/12/13/14 memory map

0x5000 0000

0x5001 0000

0x5002 0000

0x5020 0000

AHB peripherals

127-16 reserved

GPIO PIO1

4-7

0x5003 0000

0x5004 0000

GPIO PIO2

GPIO PIO3

8-11

12-15

GPIO PIO0

0-3

APB peripherals

0x4000 4000

0x4000 8000

0x4000 C000

0x4001 0000

0x4001 8000

0x4002 0000

0x4002 8000

0x4003 8000

0x4003 C000

0x4004 0000

0x4004 4000

0x4004 8000

0x4004 C000

0x4005 8000

0x4005 C000

0x4008 0000

0x4002 4000

0x4001 C000

0x4001 4000

0x4000 0000

WDT

32-bit counter/timer 0

32-bit counter/timer 1

ADC

UART

PMU

I2C-bus

13-10 reserved

reserved

21-19 reserved

31-23 reserved

reserved

0x0000 0000

0 GB

0.5 GB

4 GB

1 GB

0x0000 2000

0x1000 2000

0x1000 1000

0x1000 0800

0x1FFF 0000

0x1FFF 4000

0x2000 0000

0x4000 0000

0x4008 0000

0x5000 0000

0x5020 0000

0xFFFF FFFF

reserved

APB peripherals

AHB peripherals

8 kB SRAM (LPC1113/14/301/302)

0x1000 0000

4 kB SRAM (LPC1111/12/13/14/201/202)

2 kB SRAM (LPC1111/12/101/102)

LPC1111/12/13/14

8 kB on-chip flash (LPC1111)

0x0000 4000

0x0000 6000

16 kB on-chip flash (LPC1112)

0x0000 8000

32 kB on-chip flash (LPC1114)

24 kB on-chip flash (LPC1113)

16 kB boot ROM

0x0000 0000

0x0000 00C0

active interrupt vectors

002aae699

reserved

SPI0

16-bit counter/timer 1

16-bit counter/timer 0

IOCONFIG

system control

SPI1(1)

flash controller

0xE000 0000

0xE010 0000

private peripheral bus

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