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LPC1850 Datasheet(PDF) 108 Page - NXP Semiconductors |
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LPC1850 Datasheet(HTML) 108 Page - NXP Semiconductors |
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108 / 157 page ![]() LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 3 — 6 December 2011 108 of 157 NXP Semiconductors LPC1850/30/20/10 32-bit ARM Cortex-M3 microcontroller 11.7 USART interface Fig 26. I2S-bus timing (receive) 002aag498 Tcy(clk) tf tr tWH tsu(D) th(D) tsu(D) tsu(D) tWL I2Sx_RX_SCK I2Sx_RX_SDA I2Sx_RX_WS Table 15. Dynamic characteristics: USART interface Tamb =25 C; 2.2 V VDD(REG)(3V3) 3.6 V; 2.7 V VDD(IO) 3.6 V; CL = 20 pF. Simulated values. Symbol Parameter Conditions Min Typ Max Unit Tcy(clk) clock cycle time on pins Ux_UCLK - 0.1 - s output tv(Q) data output valid time on pin Ux_TXD - 6.5 - ns |
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