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ADS1292 Datasheet(PDF) 17 Page - Texas Instruments

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Part # ADS1292
Description  Low-Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements
PDF  69 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS1292 Datasheet(HTML) 17 Page - Texas Instruments

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ADS1291
ADS1292
ADS1292R
www.ti.com
SBAS502A – DECEMBER 2011 – REVISED MARCH 2012
THEORY OF OPERATION
This section contains details of the ADS1291, ADS1292, and ADS1292R internal functional elements. The
analog blocks are discussed first followed by the digital interface. Blocks implementing ECG-specific functions
are covered in the end.
Throughout this document, fCLK denotes the signal frequency at the CLK pin, tCLK denotes the signal period of the
CLK pin, fDR denotes the output data rate, tDR denotes the output data time period, and fMOD denotes the
frequency at which the modulator samples the input.
EMI FILTER
An RC filter at the input acts as an electromagnetic interference (EMI) filter on channels 1 and 2. The –3-dB filter
bandwidth is approximately 3 MHz.
INPUT MULTIPLEXER
The ADS1291, ADS1292, and ADS1292R input multiplexers are very flexible and provide many configurable
signal-switching options. Figure 19 shows the multiplexer for the ADS1291, ADS1292, and ADS1292R. Note that
TESTP, TESTM, and RLDIN/RLDREF are common to both channels. INP and INN are separate for each of the
three pins. This flexibility allows for significant device and sub-system diagnostics, calibration, and configuration.
Switch settings for each channel are selected by writing the appropriate values to the CH1SET or CH2SET
register (see the CH1SET and CH2SET Registers in the Register Map section for details). More details of the
ECG-specific features of the multiplexer are discussed in the Input Multiplexer subsection of the ECG-Specifc
Functions.
Device Noise Measurements
Setting CHnSET[3:0] = 0001 sets the common-mode voltage of (VREFP + VREFN)/2 to both inputs of the
channel. This setting can be used to test the inherent noise of the device in the user system.
Test Signals (TestP and TestN)
Setting CHnSET[3:0] = 0101 provides internally-generated test signals for use in sub-system verification at
power-up. This functionality allows the entire signal chain to be tested out. Although the test signals are similar to
the CAL signals described in the IEC60601-2-51 specification, this feature is not intended for use in compliance
testing.
Test signals are controlled through register settings (see the CONFIG2: Configuration Register 2 subsection in
the Register Map section for details). INT_TEST enables the test signal and TEST_FREQ controls switching at
the required frequency.
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s): ADS1291 ADS1292 ADS1292R



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