ADS1292 datasheet(32/69 Pages) TI

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START

DRDY

CLK

DataUpdating

SETTLE

ADS1291

ADS1292

ADS1292R

SBAS502A – DECEMBER 2011 – REVISED MARCH 2012

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Single-Shot Mode

The single-shot mode is enabled by setting the SINGLE_SHOT bit in the CONFIG1 register to '1'. In single-shot

mode, the ADS1291, ADS1292, and ADS1292R perform a single conversion when the START pin is taken high

or when the START opcode command is sent. As seen in Figure 39, when a conversion is complete, DRDY goes

low and further conversions are stopped. Regardless of whether the conversion data are read or not, DRDY

remains low. To begin a new conversion, take the START pin low and then back high, or transmit the START

opcode again. When switching from continuous mode to pulse mode, make sure the START signal is pulsed or

issue a STOP command followed by a START command.

This conversion mode is provided for applications that require non-standard or non-continuous data rates.

Issuing a START command or toggling the START pin high resets the digital filter, effectively dropping the data

rate by a factor of four. Note that this mode leaves the system more susceptible to aliasing effects, requiring

more complex analog anti-aliasing filters at the inputs. Loading on the host processor increases because it must

toggle the START pin or send a START command to initiate a new conversion cycle.

Figure 40. DRDY with No Data Retrieval in Single-Shot Mode

MULTIPLE DEVICE CONFIGURATION

The ADS1291, ADS1292, and ADS1292R are designed to provide configuration flexibility when multiple devices

are used in a system. The serial interface typically needs four signals: DIN, DOUT, SCLK, and CS. With one

additional chip select signal per device, multiple devices can be connected together. The number of signals

needed to interface n devices is 3 + n.

The right leg drive amplifiers can be daisy-chained as explained in the RLD Configuration with Multiple Devices

subsection of the ECG-Specific Functions section. To use the internal oscillator in a daisy-chain configuration,

one of the devices must be set as the master for the clock source with the internal oscillator enabled (CLKSEL

pin = 1) and the internal oscillator clock brought out of the device by setting the CLK_EN register bit to '1'. This

master device clock is used as the external clock source for the other devices.

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ADS1292 Datasheet(PDF) 32 Page - Texas Instruments