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ADS1292 Datasheet(PDF) 23 Page - Texas Instruments |
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ADS1292 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 69 page ![]() −160 −150 −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0.001 0.01 0.1 1 Normalized Frequency (fIN/fMOD) G001 ½ H(z) = ½ 3 1 Z - - N 1 Z - - 1 ½ H(f) = ½ 3 sin N f p f MOD N sin ´ p f f MOD ADS1291 ADS1292 ADS1292R www.ti.com SBAS502A – DECEMBER 2011 – REVISED MARCH 2012 ADC ΔΣ Modulator Each channel of the ADS1291, ADS1292, and ADS1292R has a 24-bit ΔΣ ADC. This converter uses a second- order modulator optimized for low-power applications. The modulator samples the input signal at the rate of fMOD = fCLK/4 or fCLK/16, as determined by the CLK_DIV bit. In both cases, the sampling clock has a typical value of 128 kHz. As in the case of any ΔΣ modulator, the ADS1291, ADS1292, and ADS1292R noise is shaped until fMOD/2, as shown in Figure 25. The on-chip digital decimation filters explained in the Digital Decimation Filter section can be used to filter out the noise at higher frequencies. These on-chip decimation filters also provide antialias filtering. This feature of the ΔΣ converters drastically reduces the complexity of analog antialiasing filters that are typically needed with nyquist ADCs. Figure 25. Power Spectral Density (PSD) of a ΔΣ Modulator (4-Bit Quantizer) DIGITAL DECIMATION FILTER The digital filter receives the modulator output and decimates the data stream. By adjusting the amount of filtering, tradeoffs can be made between resolution and data rate: filter more for higher resolution, filter less for higher data rates. Higher data rates are typically used in ECG applications for implement software pace detection and ac lead-off detection. The digital filter on each channel consists of a third-order sinc filter. The decimation ratio on the sinc filters can be adjusted by the DR bits in the CONFIG1 register (see the Register Map section for details). This setting is a global setting that affects all channels and, therefore, in a device all channels operate at the same data rate. Sinc Filter Stage (sinx/x) The sinc filter is a variable decimation rate, third-order, low-pass filter. Data are supplied to this section of the filter from the modulator at the rate of fMOD. The sinc filter attenuates the high-frequency noise of the modulator, then decimates the data stream into parallel data. The decimation rate affects the overall data rate of the converter. Equation 8 shows the scaled Z-domain transfer function of the sinc filter. (8) The frequency domain transfer function of the sinc filter is shown in Equation 9. where: N = decimation ratio (9) Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): ADS1291 ADS1292 ADS1292R |
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