PCM9211 datasheet(38/121 Pages) TI1

38 / 121 page

RXINx

Built-in PLL

Status

XTI Status

ERROR

SCKO, BCK,

LRCK

CLKST

Non-Biphase

Biphase

Non- Biphase

Unlock

Lock

Unlock

Normal Operation

XTI (ADC) Source

DIR Source

XTI (ADC) Source

ADC Source

MUTE

DIR Source

ADC Source

DOUT

MUTE

CLKST2

CLKST1

XTIWT

PCM9211

SBAS495 – JUNE 2010

www.ti.com

DIR: Auto Source Selector for Main Output and AUX Output

The AUTO source selector is an automatic system that selects the DIR or ADC output based on specific DIR

conditions set by Register 26h. The AUTO source selector is integrated in both the Main Port and the AUX

output separately.

The typical behavior for the AUTO source selector is shown in Figure 30. This example is the default register

setting for Register 26h. In this case, only Register 26h/AUNLOCK is selected.

Figure 30. Typical Behavior for AUTO Source Selector

When the DIR is unlocked, the ADC output is automatically routed to the Main Output Port.

Polarity of the CLKST signal is configured by Register 22h/CLKSTP. The default is active low, which means that

clock source either changes from DIR to ADC, or from ADC to DIR.

If the DIR is locked, then the DIR output is routed to the Main Output Port automatically after tCLKST1. During that

period, the output port is muted. tCLKST1 can be configured using Register 23h/ERRWT[1:0]. tCLKST2 is 50 ms,

providing that an XTI clock of 24.576 MHz is applied.

If the DIR loses its lock a subsequent time, the ADC output is routed to the Main Output Port automatically after

tXTIWT. Once again, the output port is muted during this time. tXTIWT can be configured using Register

23h/XTIWT[1:0].

The auto source selector can be triggered by the following changes in the DIR (Register 26h is used to select

which variable to use as the trigger):

•

DIR error (discussed earlier in DIR: Errors and Interrupts; configured by Register 25h)

•

Out-of-range sampling frequency

•

Non-PCM data

•

When the Validity flag in the S/PDIF stream is '1'

•

When the PLL is unlocked (default)

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