PCM9211 datasheet(53/121 Pages) TI1

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Clock/ Data

Recovery

MPIO_ A

SELECTOR

MPIO_ C

SELECTOR

MPIO _B

SELECTOR

MPIO _B 0

MPIO _B 1

MPIO _B 2

MPIO _B 3

ADC

Com. Supply

MPO0/1

SELECTOR

MPO 0

MPO 1

MAIN

OUTPUT

SCKO ( DSCKO)

BCK (DBCKO )

LRCK (DSDRO )

DOUT ( DSDLO)

PORT

RXIN8

RXIN9

RXIN10

RXIN11

DITOUT

AUTO

DIR

ADC

AUXIN0

AUXIN1

AUXIN2

AUTO

DIR

ADC

AUXIN0

AUXIN1

AUXIN2

AUTO

DIR

ADC

AUXIN0

AUXIN1

DIT

Lock :DIR

Unlock:ADC

AUXIN 2

AUXOUT

DITOUT

RECOUT 0

RECOUT 1

AUXIN 0

AUXIN1

ADCStandalone

ADCMode

Control

FILT

PLL

DIR

LockDetection

ADC

RECOUT0

RECOUT1

DOUT

RXIN7

SCKOfromDIR

BCKfrom AUXIN 1

LRCKfrom AUXIN 1

RXIN 0

RXIN 1

RXIN 2

RXIN 4/ASCKI 0

RXIN 3

RXIN 5/ABCKI 0

RXIN 6/ALRCKI 0

RXIN 7/ADIN0

RXIN7

RXIN6

RXIN5

RXIN4

RXIN3

RXIN2

RXIN1

RXIN0

MPIO_ A0

MPIO_ A1

MPIO_ A2

MPIO_ A3

VINL

VINR

VCOM

MPIO _C0( DSCKI)

MPIO _C1( DBCKI)

MPIO _C2( DSDRI )

MPIO _C3( DSDLI )

PCM9211

www.ti.com

SBAS495 – JUNE 2010

Figure 35 shows a block diagram of DSD Input Mode (this illustration includes an example of DSD input =

MPIO_Cx pins).

Note:

Blue lines are through-paths for DBCKI, DSDRI, and DSDLI. Red lines are DSCKO generation paths.

Figure 35. DSD Input Mode Block Diagram

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