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WM8310 Datasheet(PDF) 108 Page - Wolfson Microelectronics plc

Part # WM8310
Description  Processor Power Management Subsystem
PDF  291 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8310 Datasheet(HTML) 108 Page - Wolfson Microelectronics plc

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WM8310
Pre-Production
w
PP, May 2012, Rev 3.1
108
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16387
(4003h)
Power
State
5:4
USB100MA_START
UP [1:0
00
Sets the device behaviour when starting
up under USB power, when USB_ILIM
= 010 (100mA)
00 = Normal
01 = Soft-Start
10 = Only start if BATTVDD > 3.1V
11 = Only start if BATTVDD > 3.4V
In the 1X modes, if the battery voltage
is less than the selected threshold, then
the device will enable trickle charge
mode instead of executing the start-up
request. The start-up request is delayed
until the battery voltage threshold has
been met. Note that trickle charge is
only possible when CHG_ENA=1.
3
USB_CURR_STS
0
Indicates if the USB current limit has
been reached
0 = Normal
1 = USB current limit
2:0
USB_ILIM
010
Sets the USB current limit
000 = 0mA (USB switch is open)
001 = 2.5mA
010 = 100mA
011 = 500mA
100 = 900mA
101 = 1500mA
110 = 1800mA
111 = 550mA
Note that, when starting up the
WM8310 with the USBVDD supply
selected, the USB_ILIM register must
be set to 100mA or higher.
Table 55 Configuring the USB Power Operation
17.5 POWER PATH MANAGEMENT INTERRUPTS
The Power Path Management circuit is associated with three Interrupt event flags.
The PPM_SYSLO_EINT interrupt bit is set when the internal signal SYSLO is asserted. This indicates
a SYSVDD undervoltage condition, described in Section 24.4.
The PPM_PWR_SRC_EINT interrupt bit is set whenever the status of the Wall or USB supplies
changes, indicating a connection, disconnection, or a voltage. See Section 17.1.
The PPM_USB_CURR_EINT interrupt bit is set whenever the permitted USB current limit has been
reached. See Section 17.4.
Each of these secondary interrupts triggers a primary Power Path Management Interrupt, PPM_INT
(see Section 23). This can be masked by setting the mask bit(s) as described in Table 56.



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