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WM8326 Datasheet(PDF) 255 Page - Wolfson Microelectronics plc

Part # WM8326
Description  Processor Power Management Subsystem
PDF  255 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8326 Datasheet(HTML) 255 Page - Wolfson Microelectronics plc

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Production Data
WM8326
w
PD, June 2012, Rev 4.0
255
33 REVISION HISTORY
DATE
REV
DESCRIPTION OF CHANGES
CHANGED
BY
October 2010
1.0
Initial version created.
PH
October 2010
1.0
CLKIN renamed as TEST
PH
26/01/2011
1.1
SDOUT1 description amended to Open Drain, with external pull-up required.
Default value of PWRSTATE_DLY corrected.
Alternative 2.2uH recommended inductor quoted for DC1, DC2.
Undervoltage margin specified for all DC-DC converters.
Overvoltage margin specified for DC-DC converters 1, 2.
Chip Temperature (AUX_DATA) equation updated.
PH
07/03/11
1.1
Added notes that SLEEP > OFF is not a controlled transition; converters and
regulators are disabled immediately.
RESET pin description updated to note integrated pull-up.
IRQ description updated to note pull-up in Open Drain mode.
System Reset and Device Reset descriptions updated, consistent with the
Summary Table.
Recommended external pull-up resistances added in Pin Description.
Internal pull-up / pull-down resistances added in Electrical Characteristics.
Noted Active High (non-inverted) polarity for GPIO “Power On/Off request”
function is not fully supported in development mode.
PH
2.0
Noted maximum limit on Software Resets. Also clarification of the maximum
number of Watchdog / Undervoltage Device Resets.
Correction to DBVDD test conditions (Section 7.7).
RTC_PINT_FREQ definition updated.
DC-DC output inductor saturation limit recommendations added.
SYSOK_THR register description updated.
Quiescent current characteristics updated for DC-DC 1-4.
DC1/2 output current rating reduced to 1250mA in 4MHz mode.
PH
15/09/11
2.0
Backup battery power updated; Charger control registers deleted.
LDO11 output amended for LDO11_VSEL_SRC=1 and DC-DC1 disabled.
OTP Register Map overview correction (GPn_TRI replaced with GPn_ENA).
PH
01/12/11
2.1
LDO11 maximum output current increased (only for PVDD ≥ 3.1V).
PH
01/02/12
2.1
Electrical Characteristics updated.
DC3_STNBY_LIM, DC4_STNBY_LIM descriptions updated.
SYSOK_THR description updated.
PH
07/03/12
3.0
Product status changed to Pre-Production.
PH
25/06/12
4.0
Product status changed to Production Data
JMacD



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