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WM8351 Datasheet(PDF) 134 Page - Wolfson Microelectronics plc |
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WM8351 Datasheet(HTML) 134 Page - Wolfson Microelectronics plc |
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134 / 330 page ![]() WM8351 Production Data w PD, April 2012, Rev 4.5 134 14.7 CONFIGURING THE LDO REGULATORS The configuration of the LDO Regulators is described in the following sections. Some of the control fields form part of the Custom Mode configuration settings and therefore will not require to be set in software in some applications. 14.7.1 LDO REGULATOR ENABLE The LDO Regulators can be enabled in software using the register fields defined in Table 82. To reduce supply in-rush current, individual regulators should be programmed to start in different time slots within the start-up sequence. In the WM8351 ACTIVE state, the LDO Regulators can be enabled in software using the LDOn_ENA bits. Setting these bits whilst in the Pre-Active state (see Figure 65) will not immediately enable the corresponding LDO Regulators; these bits will only become effective once the WM8351 has reached the ACTIVE state. Each Regulator may be programmed to switch on in a selected timeslot within the start-up sequence. The WM8351 will set the LDOn_ENA field for any LDO Regulator that is enabled during the start-up sequence. Note that setting the LDOn_ENSLOT fields in software is only relevant to the Development Mode, as these fields are assigned preset values in each of the Custom Modes. Each Regulator may be programmed to switch off in a selected timeslot within the shutdown sequence. If a Regulator is not allocated to one of the 14 shutdown timeslots, it will be disabled when the WM8351 enters the OFF state. ADDRESS BIT LABEL DEFAULT DESCRIPTION R13 (0Dh) or R176 (B0h) DC-DC / LDO requested 8 LDO1_ENA 0 LDO1 enable 0 = disabled 1 = enabled Note: internal conditions may prevent the converter from actually switching on - see DCDC/LDO Status register for actual converter status. 9 LDO2_ENA 0 LDO2 enable 0 = disabled 1 = enabled Note: internal conditions may prevent the converter from actually switching on - see DCDC/LDO Status register for actual converter status. 10 LDO3_ENA 0 LDO3 enable 0 = disabled 1 = enabled Note: internal conditions may prevent the converter from actually switching on - see DCDC/LDO Status register for actual converter status. 11 LDO4_ENA 0 LDO4 enable 0 = disabled 1 = enabled Note: internal conditions may prevent the converter from actually switching on - see DCDC/LDO Status register for actual converter status. Note: These bits can be accessed through R13 or through R176. Reading from or writing to either register location has the same effect. R201 (C9h) for LDO1 R204 (CCh) for LDO2 13:10 LDOn_ENSL OT [3:0] 0000 Time slot for LDOn start-up 0000 = Disabled (do not start up) 0001 = Start-up in time slot 1 … (total 14 slots available) 1110 = Start-up in time slot 14 |
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