WM8352 datasheet(261/336 Pages) WOLFSON

261 / 336 page

Production Data

WM8352

PD, February 2011, Rev 4.4

261

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R111 (6Fh)

BEEP

Volume

IN3R_TO_OUT2R

Beep mixer enable

0 = disabled

1 = enabled

7:5

IN3R_OUT2R_VOL[2:0]

000

Beep mixer volume:

000 = -15dB

… in +3dB steps

111 = +6dB

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R112 (70h)

AI Formating

AIF_BCLK_INV

0 = normal

1 = inverted

AIF_TRI

Sets Output enables for LRCLK and BCLK and

ADCDAT to inactive state

0 = normal

1 = forces pins to Hi-Z

AIF_LRCLK_INV

LRCLK clock polarity

0 = normal

1 = inverted

DSP Mode – mode A/B select

0 = MSB is available on 2nd BCLK rising edge after

LRCLK rising edge (mode A)

1 = MSB is available on 1st BCLK rising edge after

LRCLK rising edge (mode B)

11:10

AIF_WL[1:0]

Data word length

11 = 32 bits

10 = 24 bits

01 = 20 bits

00 = 16 bits

Note: When using the Right-Justified data format

(FMT=00), the maximum word length is 24 bits.

9:8

AIF_FMT[1:0]

00 = Right-justified

01 = Left justified

10 = I2S

11 = DSP / PCM mode

WM8352 Datasheet(PDF) 261 Page - Wolfson Microelectronics plc

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