AD9915 datasheet(13/48 Pages) AD

13 / 48 page

Data Sheet

AD9915

Rev. A | Page 13 of 48

Figure 10. Wideband SFDR at 978.2 MHz,

SYSCLK = 2.5 GHz (SYSCLK PLL Bypassed)

Figure 11. Wideband SFDR vs. Normalized fOUT

SYSCLK = 2.5 GHz

Figure 12. Wideband SFDR vs. Normalized fOUT,

SYSCLK = 2.5 GHz to 2.5 GHz

Figure 13. Narrow-Band SFDR at 978.2 MHz,

SYSCLK = 2.5 GHz (SYSCLK PLL Bypassed)

Figure 14. Absolute Phase Noise of REF CLK Source Driving AD9915

Rohde & Schwarz SMA100 Signal Generator at 2.5 GHz Buffered by Series

ADCLK925

Figure 15. Absolute Phase Noise Curves of DDS Output at 2.5 GHz Operation

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

START 0Hz

125MHz/DIV

STOP 1.25GHz

–80

0.05

0.10

0.15

0.40

0.35

0.30

0.25

0.20

fC/fS

–70

–60

–50

–40

–30

–20

–10

–80

0.05

0.10

0.15

0.40

0.35

0.30

0.25

0.20

fC/fS

–70

–60

–50

–40

–30

–20

–10

SYSCLK = 1.5GHz

SYSCLK = 1.6GHz

SYSCLK = 1.7GHz

SYSCLK = 1.8GHz

SYSCLK = 1.9GHz

SYSCLK = 2.0GHz

SYSCLK = 2.1GHz

SYSCLK = 2.2GHz

SYSCLK = 2.3GHz

SYSCLK = 2.4GHz

SYSCLK = 2.5GHz

CENTER 978.214MHz

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

50kHz/DIV

SPAN 500kHz

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

–70

–90

–80

–100

–110

–120

–130

–140

–150

–160

–170

SMA AND

ADCLK925

SMA

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

–70

–90

–80

–100

–110

–120

–130

–140

–150

–160

–170

978MHz

123MHz

305MHz

497MHz

AD9915 Datasheet(PDF) 13 Page - Analog Devices

AD9915 Datasheet(HTML) 13 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL