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AD9915 Datasheet(PDF) 15 Page - Analog Devices |
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AD9915 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 48 page ![]() Data Sheet AD9915 Rev. A | Page 15 of 48 Figure 22. SYNC_OUT (fSYSCLK/384) Figure 23. DAC Calibration Time vs. SYSCLK Rate. See the DAC Calibration Output section for formula. Figure 24. Measured Rising Linear Frequency Sweep Figure 25. Measured Falling Linear Frequency Sweep CH2 1.0V Ω M20.00ms 5.0GS/s IT 40.0ps/pt A CH2 1.64V 2 2.0 1.8 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 500 2500 SYSTEM CLOCK RATE (MHz) 1000 1500 2000 930 870 880 890 900 910 920 –6 –2 –4 6 4 2 0 TIME (ms) 930 870 880 890 900 910 920 –6 –2 –4 6 4 2 0 TIME (ms) |
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