RT8167B datasheet(34/38 Pages) RICHTEK

34 / 38 page

RT8167B

DS8167B-00

October 2011

www.richtek.com

Considering the inductance tolerance, the resistor RX has

to be tuned on board by examining the transient voltage.

If the output voltage transient has an initial dip below the

minimum load line requirement with a slow recovery, RX

is too small. Vice versa, if the resistance is too large the

output voltage transient will only have a small initial dip

and the recovery will be too fast, causing a ring-back.

Using current-sense resistor in series with the inductor

can have better accuracy, but the efficiency is a trade-off.

Considering the equivalent inductance (LESL) of the current

sense resistor, a RC filter is recommended. The RC filter

calculation method is similar to the above-mentioned

inductor DCR sensing method.

Operation Mode Transition

The RT8167B supports operation mode transition function

in CORE/GFX VR for the SetPS command of Intel's VR12/

IMVP7 CPU. The default operation mode of the RT8167B's

CORE/GFX VR is PS0, which is CCM operation. The other

operation mode is PS2 (DEM operation).

After receiving SetPS command, the CORE/GFX VR will

immediately change to the new operation state. When

VR receives SetPS command of PS2 operation mode,

the VR operates as a DEM controller.

If VR receives dynamic VID change command (SetVID),

VR will automatically enter PS0 operation mode. After

output voltage reaches target voltage, VR will stay at PS0

state and ignore former SetPS command. Only by

re-sending SetPS command after SetVID command will

VR be forced into PS2 operation state again.

Thermal Monitoring and Temperature Reporting

CORE/GFX VR provides thermal monitoring function via

sensing TSEN pin voltage. Through the voltage divider

resistors R1, R2, R3 and RNTC, the voltage of TSEN will

be proportional to VR temperature. When VR temperature

rises, the TSENx voltage also rises. The ADC circuit of

VR monitors the voltage variation at TSENx pin from 1.47V

to 1.89V with 55mV resolution, and this voltage is decoded

into digital format and stored into the Temperature Zone

Figure 13. Thermal Monitoring Circuit

To meet Intel's VR12/IMVP7 specification, platform users

have to set the TSEN voltage to meet the temperature

variation of VR from 75% to 100% VR max temperature.

For example, if the VR max temperature is 100

°C, platform

users have to set the TSEN voltage to be 1.4875V when

VR temperature reaches 75

°C and 1.8725V when VR

temperature reaches 100

°C. Detailed voltage setting

versus temperature variation is shown in Table 2.

Thermometer code is implemented in the Temperature

Zone register.

TSENx

VCC

RNTC

Table 2. Temperature Zone Register

VRHOT

SVID

Thermal

Alert

Comparator Trip Points

Temperatures Scaled to maximum =

100%

Voltage Represents Assert bit

Minimum Level

100%

97%

94% 91% 88% 85% 82% 75%

1.855V

1.8V

1.745

1.69

1.635

1.58

1.52

1.47

TSEN Pin Voltage

Temperature_Zone

1.855

≤ V

TSEN

1111_1111

1.800

≤ VTSEN ≤ 1.835

0111_1111

1.745

≤ V

TSEN ≤ 1.780

0011_1111

1.690

≤ VTSEN ≤ 1.725

0001_1111

1.635

≤ VTSEN ≤ 1.670

0000_1111

1.580

≤ VTSEN ≤ 1.615

0000_0111

1.525

≤ VTSEN ≤ 1.560

0000_0011

1.470

≤ VTSEN ≤ 1.505

0000_0001

VTSEN < 1.470

0000_0000

RT8167B Datasheet(PDF) 34 Page - Richtek Technology Corporation

RT8167B Datasheet(HTML) 34 Page - Richtek Technology Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL